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From: sashiko-bot@kernel.org
To: "Wolfram Sang" <wsa+renesas@sang-engineering.com>
Cc: devicetree@vger.kernel.org, wsa+renesas@sang-engineering.com,
	conor+dt@kernel.org, robh@kernel.org
Subject: Re: [PATCH v2 1/2] arm64: renesas: r8a78000: add MFIS, MFIS SCP and transport nodes
Date: Tue, 19 May 2026 08:05:19 +0000	[thread overview]
Message-ID: <20260519080519.C4B97C2BCB3@smtp.kernel.org> (raw)
In-Reply-To: <20260519074702.3308-5-wsa+renesas@sang-engineering.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Removing the `prr` node silently breaks SoC revision detection and hardware ID verification in the Renesas SoC initialization driver.
--

commit c054ca5a70ce33a42761e6ba3a791607f5814e31
Author: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

arm64: renesas: r8a78000: add MFIS, MFIS SCP and transport nodes

This commit describes the MFIS and MFIS SCP instances used for tasks including
inter-processor communication. It removes the PRR node, handling it using the
MFIS compatible instead, and describes the STCM transport area for shared
memory mailboxing.

> diff --git a/arch/arm64/boot/dts/renesas/r8a78000.dtsi b/arch/arm64/boot/dts/renesas/r8a78000.dtsi
> index 3e1c98903cea0..d77bed5326832 100644
> --- a/arch/arm64/boot/dts/renesas/r8a78000.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a78000.dtsi
> @@ -678,9 +678,123 @@ soc: soc {
>  		#size-cells = <2>;
>  		ranges;
>  
> -		prr: chipid@189e0044 {
> -			compatible = "renesas,prr";
> -			reg = <0 0x189e0044 0 4>;
> +		mfis: system-controller@189e0000 {
> +			compatible = "renesas,r8a78000-mfis";

Does removing the prr node break SoC revision detection and hardware ID
verification in the Renesas SoC initialization driver?

The drivers/soc/renesas/renesas-soc.c driver uses the renesas_ids array to
find the chip ID register, which currently matches "renesas,prr" and
"renesas,bsid".

The driver can also fall back to a hardcoded family->reg address, but the
fam_rcar_gen5 family structure leaves .reg uninitialized.

Since the prr node is replaced with renesas,r8a78000-mfis without updating
renesas_ids, will renesas_soc_init() fail to map the chip ID register and skip
reading the product register? This would prevent the hardware revision from
populating in sysfs (/sys/devices/soc0/revision).

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260519074702.3308-4-wsa+renesas@sang-engineering.com?part=1

  reply	other threads:[~2026-05-19  8:05 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-19  7:47 [PATCH v2 0/2] arm64: renesas: r8a78000-ironhide: enable SCMI Wolfram Sang
2026-05-19  7:47 ` [PATCH v2 1/2] arm64: renesas: r8a78000: add MFIS, MFIS SCP and transport nodes Wolfram Sang
2026-05-19  8:05   ` sashiko-bot [this message]
2026-05-19  8:38     ` Wolfram Sang
2026-05-19  7:47 ` [PATCH v2 2/2] arm64: renesas: r8a78000-ironhide: enable to use SCMI Wolfram Sang
2026-05-19  8:17   ` sashiko-bot
2026-05-19  8:39     ` Wolfram Sang

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