Re: [PATCH v3 14/17] arm64: dts: realtek: Add EL2 virtual timer interrupt

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The EL2 virtual timer interrupt (PPI 12) in `kent.dtsi` is incorrectly configured with an active-high trigger type (`IRQ_TYPE_LEVEL_HIGH`).
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commit f079ad98f64e8cdedfbfede9fd625a2762e0efa9
Author: Marc Zyngier <maz@kernel.org>

arm64: dts: realtek: Add EL2 virtual timer interrupt

This commit adds the missing EL2 virtual timer interrupt for ARMv8.2 based
Realtek SoCs. It also addresses a conflict on the kent platform by changing
the EL2 virtual timer assignment from PPI9 to PPI12.

> diff --git a/arch/arm64/boot/dts/realtek/kent.dtsi b/arch/arm64/boot/dts/realtek/kent.dtsi
> index ae006ce244205..4147e4269247a 100644
> --- a/arch/arm64/boot/dts/realtek/kent.dtsi
> +++ b/arch/arm64/boot/dts/realtek/kent.dtsi
> @@ -23,7 +23,7 @@ timer {
>  			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
>  			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
>  			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
> -			     <GIC_PPI  9 IRQ_TYPE_LEVEL_HIGH>;
> +			     <GIC_PPI 12 IRQ_TYPE_LEVEL_HIGH>;

[Severity: High]
Should this interrupt be configured as active-low?

ARM architected timer interrupts are universally active-low, as seen in the
other interrupts for this timer and the newly added PPI 12 in rtd16xx.dtsi.

It appears the update changed the interrupt number but kept the
IRQ_TYPE_LEVEL_HIGH polarity that was used for the GIC maintenance interrupt.
Could configuring the GIC with the incorrect trigger type lead to missed EL2
virtual timer interrupts or an interrupt storm?

[ ... ]

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Sashiko AI review · https://sashiko.dev/#/patchset/20260523140242.586031-1-maz@kernel.org?part=14