Re: [PATCHv2 2/2] arm64: dts: socfpga: agilex5: popuplate reset properties for I3C

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Undocumented 'resets' and 'reset-names' properties added to the I3C nodes without corresponding YAML binding schema update.
--

commit ebac99bb72bcfe3b4b8a0fa7c960df7984ddf40d
Author: Dinh Nguyen <dinguyen@kernel.org>

arm64: dts: socfpga: agilex5: popuplate reset properties for I3C

This commit adds resets and reset-names properties to the I3C nodes in the 
Agilex5 device tree to bring the IP out of reset.

> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 02e62d954e949..55313d45c90ed 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -244,6 +244,8 @@ i3c0: i3c@10da0000 {
>  			reg = <0x10da0000 0x1000>;
>  			#address-cells = <3>;
>  			#size-cells = <0>;
> +			resets = <&rst I3C0_RESET>;
> +			reset-names = "core_rst";

[Severity: Low]
Will adding these properties without an accompanying binding update cause 
dtbs_check to fail? 

It looks like the bindings for these nodes validate against 
Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml, which 
enforces unevaluatedProperties: false. However, neither that schema nor 
the schemas it includes appear to declare the resets or reset-names 
properties. 

Should the YAML binding schema be updated to document these capabilities 
and prevent validation errors?

>  			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&clkmgr AGILEX5_L4_MP_CLK>;
>  			status = "disabled";

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527174221.79259-2-dinguyen@kernel.org?part=1