[PATCHv2 2/2] arm64: dts: socfpga: agilex5: popuplate reset properties for I3C

[Dinh Nguyen <dinguyen@kernel.org>]

The I3C nodes are missing the resets and reset-name properties that are
needed to bring the IP out of reset.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: add reset-names, remove reset property for NAND
---
 arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index b06c6d5d60eed..fc169b869443b 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -244,6 +244,8 @@ i3c0: i3c@10da0000 {
 			reg = <0x10da0000 0x1000>;
 			#address-cells = <3>;
 			#size-cells = <0>;
+			resets = <&rst I3C0_RESET>;
+			reset-names = "core_rst";
 			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clkmgr AGILEX5_L4_MP_CLK>;
 			status = "disabled";
@@ -255,6 +257,8 @@ i3c1: i3c@10da1000 {
 			reg = <0x10da1000 0x1000>;
 			#address-cells = <3>;
 			#size-cells = <0>;
+			resets = <&rst I3C1_RESET>;
+			reset-names = "core_rst";
 			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clkmgr AGILEX5_L4_MP_CLK>;
 			status = "disabled";
-- 
2.42.0.411.g813d9a9188