[PATCHv2 1/2] dt-bindings: i3c: dw: add resets and reset-names

[PATCHv2 1/2] dt-bindings: i3c: dw: add resets and reset-names

[Dinh Nguyen]

The DW I3C driver is already getting the "core_rst" reset name, but it
has not been documented.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: Added this patch
---
 .../devicetree/bindings/i3c/snps,dw-i3c-master.yaml       | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml b/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml
index e803457d3f554..7a39fe62bbbc0 100644
--- a/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml
+++ b/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml
@@ -35,6 +35,14 @@ properties:
       - const: core
       - const: apb
 
+  resets:
+    items:
+      - description: Core reset signal
+
+  reset-names:
+    items:
+      - const: core_rst
+
   interrupts:
     maxItems: 1
 
-- 
2.42.0.411.g813d9a9188

[PATCHv2 2/2] arm64: dts: socfpga: agilex5: popuplate reset properties for I3C

[Dinh Nguyen]

The I3C nodes are missing the resets and reset-name properties that are
needed to bring the IP out of reset.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: add reset-names, remove reset property for NAND
---
 arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index b06c6d5d60eed..fc169b869443b 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -244,6 +244,8 @@ i3c0: i3c@10da0000 {
 			reg = <0x10da0000 0x1000>;
 			#address-cells = <3>;
 			#size-cells = <0>;
+			resets = <&rst I3C0_RESET>;
+			reset-names = "core_rst";
 			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clkmgr AGILEX5_L4_MP_CLK>;
 			status = "disabled";
@@ -255,6 +257,8 @@ i3c1: i3c@10da1000 {
 			reg = <0x10da1000 0x1000>;
 			#address-cells = <3>;
 			#size-cells = <0>;
+			resets = <&rst I3C1_RESET>;
+			reset-names = "core_rst";
 			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clkmgr AGILEX5_L4_MP_CLK>;
 			status = "disabled";
-- 
2.42.0.411.g813d9a9188

Re: [PATCHv2 2/2] arm64: dts: socfpga: agilex5: popuplate reset properties for I3C

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Undocumented 'resets' and 'reset-names' properties added to the I3C nodes without corresponding YAML binding schema update.
--

commit ebac99bb72bcfe3b4b8a0fa7c960df7984ddf40d
Author: Dinh Nguyen <dinguyen@kernel.org>

arm64: dts: socfpga: agilex5: popuplate reset properties for I3C

This commit adds resets and reset-names properties to the I3C nodes in the 
Agilex5 device tree to bring the IP out of reset.

> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 02e62d954e949..55313d45c90ed 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -244,6 +244,8 @@ i3c0: i3c@10da0000 {
>  			reg = <0x10da0000 0x1000>;
>  			#address-cells = <3>;
>  			#size-cells = <0>;
> +			resets = <&rst I3C0_RESET>;
> +			reset-names = "core_rst";

[Severity: Low]
Will adding these properties without an accompanying binding update cause 
dtbs_check to fail? 

It looks like the bindings for these nodes validate against 
Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml, which 
enforces unevaluatedProperties: false. However, neither that schema nor 
the schemas it includes appear to declare the resets or reset-names 
properties. 

Should the YAML binding schema be updated to document these capabilities 
and prevent validation errors?

>  			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&clkmgr AGILEX5_L4_MP_CLK>;
>  			status = "disabled";

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527174221.79259-2-dinguyen@kernel.org?part=1

Re: [PATCHv2 1/2] dt-bindings: i3c: dw: add resets and reset-names

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] The commit documents `reset-names` for a single-entry reset, which violates DT binding guidelines and codifies a brittle pattern in the driver that causes silent hardware failures if the name is omitted in the DTS.
--

commit 5db0a7d3c21cf60d537f37725a5d5312d88c8c4f
Author: Dinh Nguyen <dinguyen@kernel.org>

dt-bindings: i3c: dw: add resets and reset-names

This commit updates the snps,dw-i3c-master binding to document the core
reset signal. It adds both the resets and reset-names properties to match
what the driver currently expects.

> diff --git a/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml b/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml
> index e803457d3f554..7a39fe62bbbc0 100644
> --- a/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml
> +++ b/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml
> @@ -35,6 +35,14 @@ properties:
>        - const: core
>        - const: apb
>  
> +  resets:
> +    items:
> +      - description: Core reset signal
> +
> +  reset-names:
> +    items:
> +      - const: core_rst
> +

[Severity: High]
This is a pre-existing issue, but documenting reset-names for a single-entry
reset codifies a brittle pattern in the driver that can cause silent hardware
failures.

DT binding guidelines recommend skipping *-names for single-entry lists.
Because reset-names is not marked as required, a DTS author could provide
a valid resets property without reset-names.

If this happens, the driver's call to request "core_rst" will fail to find
the name. Since the request is optional, it returns a NULL reset handle
instead of an error. The driver will silently proceed, but calls to assert the
reset will be no-ops, potentially leading to hardware lockups.

Should we drop reset-names from this binding and instead update the driver to
request the single reset by passing NULL instead of "core_rst"?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527174221.79259-1-dinguyen@kernel.org?part=1

Re: [PATCHv2 1/2] dt-bindings: i3c: dw: add resets and reset-names

[Krzysztof Kozlowski]

On 27/05/2026 19:42, Dinh Nguyen wrote:
> The DW I3C driver is already getting the "core_rst" reset name, but it
> has not been documented.
> 
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
> ---
> v2: Added this patch
> ---
>  .../devicetree/bindings/i3c/snps,dw-i3c-master.yaml       | 8 ++++++++
>  1 file changed, 8 insertions(+)

This was already sent by Jisheng, I believe.

Best regards,
Krzysztof