From: sashiko-bot@kernel.org
To: "Khristine Andreea Barbulescu" <khristineandreea.barbulescu@oss.nxp.com>
Cc: robh@kernel.org, conor+dt@kernel.org, imx@lists.linux.dev,
Frank.Li@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v3 1/1] arm64: dts: s32g: add PWM support for s32g2 and s32g3
Date: Fri, 29 May 2026 07:24:22 +0000 [thread overview]
Message-ID: <20260529072423.1243F1F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260529070502.1749632-2-khristineandreea.barbulescu@oss.nxp.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Low] Devicetree node names use underscores instead of hyphens.
- [Low] Inconsistent indentation for property continuations in DTS nodes.
--
commit ffbe8dd9e7b30291bb99de8bc8fc2e7bc1d421ea
Author: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com>
arm64: dts: s32g: add PWM support for s32g2 and s32g3
This commit adds PWM0 and PWM1 nodes for S32G2 and S32G3 SoCs. It configures
the device nodes in the respective dtsi files and adds the corresponding
pinctrl configurations in the EVB dtsi.
> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> index 51d00dac12deb..9f5f18d541183 100644
> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
[ ... ]
> @@ -554,6 +554,19 @@ i2c2: i2c@401ec000 {
> status = "disabled";
> };
>
> + pwm0: pwm@401f4000 {
> + compatible = "nxp,s32g2-ftm-pwm";
> + reg = <0x401f4000 0x1000>;
> + #pwm-cells = <3>;
> + clocks = <&clks 5>,
> + <&clks 6>,
> + <&clks 5>,
> + <&clks 5>;
> + clock-names = "ftm_sys", "ftm_ext",
> + "ftm_fix", "ftm_cnt_clk_en";
[Severity: Low]
This isn't a bug, but there is an indentation inconsistency here. The second
line of the clock-names property appears to be over-indented compared to the
alignment used in the pwm1 node. Should this align evenly with the strings on
the first line?
> + status = "disabled";
> + };
> +
[ ... ]
> diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
> index e314f3c7d61d0..408bf0b407346 100644
> --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
[ ... ]
> @@ -617,6 +617,20 @@ i2c2: i2c@401ec000 {
> status = "disabled";
> };
>
> + pwm0: pwm@401f4000 {
> + compatible = "nxp,s32g3-ftm-pwm",
> + "nxp,s32g2-ftm-pwm";
[Severity: Low]
This isn't a bug, but similarly to the clock-names above, the compatible
string continuation appears to be over-indented. Would it be better to align
it evenly with the first string?
> + reg = <0x401f4000 0x1000>;
[ ... ]
> diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi
> index 803ff45310771..844d2c4fabf76 100644
> --- a/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi
[ ... ]
> @@ -245,6 +245,70 @@ dspi5-grp4 {
> bias-pull-up;
> };
> };
> +
> + ftm0_pins: ftm0_pins {
> + ftm0_grp0 {
> + pinmux = <0x2912>;
> + };
[Severity: Low]
This isn't a bug, but the Devicetree specification generally recommends using
hyphens instead of underscores for node names to avoid dtc warnings. Should
these node names be changed to use hyphens (e.g., ftm0-pins and ftm0-grp0) to
stay consistent with other nodes like dspi5-grp4 in this file? The node
labels (ftm0_pins:) can safely keep their underscores.
> +
> + ftm0_grp1 {
> + pinmux = <0x122>,
> + <0xb42>;
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260529070502.1749632-2-khristineandreea.barbulescu@oss.nxp.com?part=1
prev parent reply other threads:[~2026-05-29 7:24 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-29 7:05 [PATCH v3 0/1] add PWM DTS support for S32G2/S32G3 SoCs Khristine Andreea Barbulescu
2026-05-29 7:05 ` [PATCH v3 1/1] arm64: dts: s32g: add PWM support for s32g2 and s32g3 Khristine Andreea Barbulescu
2026-05-29 7:24 ` sashiko-bot [this message]
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