From: sashiko-bot@kernel.org
To: "Khristine Andreea Barbulescu" <khristineandreea.barbulescu@oss.nxp.com>
Cc: devicetree@vger.kernel.org, robh@kernel.org, imx@lists.linux.dev,
Frank.Li@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v10 4/6] dt-bindings: pinctrl: s32g2-siul2: describe GPIO and EIRQ resources
Date: Tue, 02 Jun 2026 08:21:34 +0000 [thread overview]
Message-ID: <20260602082135.0709B1F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260602080132.3256239-5-khristineandreea.barbulescu@oss.nxp.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] The legacy fallback branch in the `oneOf` block fails to explicitly forbid newly added capability properties (`gpio-controller`, `interrupt-controller`), creating a schema validation loophole.
- [Low] The device tree example will fail `dt_binding_check` compilation due to an unresolved phandle reference to the undeclared label `&pinctrl`.
--
commit 055c2d417b67cea0bcdcafe1444e526610028d07
Author: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com>
dt-bindings: pinctrl: s32g2-siul2: describe GPIO and EIRQ resources
This commit extends the S32G2 SIUL2 pinctrl binding to describe GPIO data
and external interrupt resources. It adds GPIO and interrupt controller
properties and expands the reg property ranges. It also provides a oneOf
construct to support legacy and new node layouts.
> diff --git a/Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml
> index a24286e4def62..e4cc1a3a795c8 100644
> --- a/Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml
[ ... ]
> @@ -86,10 +118,32 @@ required:
> - compatible
> - reg
>
> +oneOf:
> + - description: Legacy pinctrl-only node
> + properties:
> + reg:
> + minItems: 6
> + maxItems: 6
[Severity: Medium]
Since gpio-controller and interrupt-controller are allowed at the top level,
does this legacy branch need to explicitly forbid them?
Without setting gpio-controller: false and interrupt-controller: false here,
could a node matching this legacy branch declare these capabilities without
providing the 11 reg items and gpio-ranges required to actually use them,
thereby bypassing schema validation?
> +
> + - description: Pinctrl node with GPIO and external interrupt support
> + required:
> + - gpio-controller
> + - "#gpio-cells"
> + - gpio-ranges
> + - interrupt-controller
> + - "#interrupt-cells"
> + - interrupts
> + properties:
> + reg:
> + minItems: 11
> + maxItems: 11
> +
> additionalProperties: false
>
> examples:
> - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> pinctrl@4009c240 {
> compatible = "nxp,s32g2-siul2-pinctrl";
[Severity: Low]
Does this node need a pinctrl: label?
The gpio-ranges property added below attempts to reference &pinctrl, which
will cause dt_binding_check to fail with a 'reference to non-existent node
or label' error.
[ ... ]
> /* IMCR119-IMCR397 registers on siul2_1 */
> <0x44010c1c 0x45c>,
> /* IMCR430-IMCR495 registers on siul2_1 */
> - <0x440110f8 0x108>;
> + <0x440110f8 0x108>,
> + /* PGPDO registers on siul2_0 */
> + <0x4009d700 0x10>,
> + /* PGPDI registers on siul2_0 */
> + <0x4009d740 0x10>,
> + /* PGPDO registers on siul2_1 */
> + <0x44011700 0x18>,
> + /* PGPDI registers on siul2_1 */
> + <0x44011740 0x18>,
> + /* EIRQ registers on siul2_1 */
> + <0x44010010 0x34>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> + gpio-ranges = <&pinctrl 0 0 102>,
> + <&pinctrl 112 112 79>;
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260602080132.3256239-1-khristineandreea.barbulescu@oss.nxp.com?part=4
next prev parent reply other threads:[~2026-06-02 8:21 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-02 8:01 [PATCH v10 0/6] gpio: siul2-s32g2: add initial GPIO driver Khristine Andreea Barbulescu
2026-06-02 8:01 ` [PATCH v10 1/6] pinctrl: s32cc: add/fix some comments Khristine Andreea Barbulescu
2026-06-02 8:06 ` sashiko-bot
2026-06-02 8:01 ` [PATCH v10 2/6] pinctrl: s32cc: remove inline specifiers Khristine Andreea Barbulescu
2026-06-02 8:01 ` [PATCH v10 3/6] pinctrl: s32cc: change to "devm_pinctrl_register_and_init" Khristine Andreea Barbulescu
2026-06-02 8:01 ` [PATCH v10 4/6] dt-bindings: pinctrl: s32g2-siul2: describe GPIO and EIRQ resources Khristine Andreea Barbulescu
2026-06-02 8:21 ` sashiko-bot [this message]
2026-06-02 8:01 ` [PATCH v10 5/6] pinctrl: s32cc: implement GPIO functionality Khristine Andreea Barbulescu
2026-06-02 8:31 ` sashiko-bot
2026-06-02 9:26 ` Enric Balletbo i Serra
2026-06-02 8:01 ` [PATCH v10 6/6] arm64: dts: s32g: describe GPIO and EIRQ resources in SIUL2 pinctrl node Khristine Andreea Barbulescu
2026-06-02 8:38 ` sashiko-bot
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