From: sashiko-bot@kernel.org
To: "Colin Huang via B4 Relay" <devnull+u8813345.gmail.com@kernel.org>
Cc: devicetree@vger.kernel.org, conor+dt@kernel.org, robh@kernel.org
Subject: Re: [PATCH v3 8/9] ARM: dts: aspeed: anacapa: Enable MCTP and FRU for NIC
Date: Tue, 02 Jun 2026 14:00:04 +0000 [thread overview]
Message-ID: <20260602140004.9B4D01F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260602-anacapa-devlop-phase-devicetree-v3-8-7c93c5df8d9b@gmail.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] Incomplete implementation: missing MCTP and FRU enablement for the Right Frontend NIC.
- [Medium] Undocumented removal of the `i2c-mux-idle-disconnect` property.
--
commit e274c5d6bfd9557e3fa26fe21930d08b6e1b3ec0
Author: Andy Chung <Andy.Chung@amd.com>
ARM: dts: aspeed: anacapa: Enable MCTP and FRU for NIC
Add the mctp-controller property to enable frontend NIC management
via PLDM over MCTP. Also add EEPROM device for NIC FRU and reorder
the I2C virtual bus index accroding to the system silkscreen index.
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt1.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt1.dts
> index 29df10697613a..5b6ce3c556fe2 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt1.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt1.dts
[ ... ]
> // R Bridge Board
> &i2c10 {
> status = "okay";
> + multi-master;
> + mctp@10 {
> + compatible = "mctp-i2c-controller";
> + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
> + };
>
> i2c-mux@71 {
> compatible = "nxp,pca9548";
> reg = <0x71>;
> #address-cells = <1>;
> #size-cells = <0>;
> - i2c-mux-idle-disconnect;
[Severity: Medium]
The commit message doesn't mention removing the i2c-mux-idle-disconnect
property.
While this is likely needed to allow asynchronous multi-master MCTP traffic
from endpoints, could the commit message document this topology change so
future maintainers don't inadvertently revert it?
>
> i2c10mux0ch0: i2c@0 {
> reg = <0>;
> #address-cells = <1>;
> #size-cells = <0>;
> };
[Severity: Medium]
The commit message mentions enabling MCTP and FRU for frontend NICs, and the
symmetrically equivalent left frontend NIC (i2c11mux0ch0) was updated, but
this right frontend NIC node was left unmodified.
Did we miss adding the mctp-controller property and FRU eeprom for this
channel?
[ ... ]
> // L Bridge Board
> &i2c11 {
> status = "okay";
> + multi-master;
> + mctp@10 {
> + compatible = "mctp-i2c-controller";
> + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
> + };
>
> i2c-mux@71 {
> compatible = "nxp,pca9548";
> reg = <0x71>;
> #address-cells = <1>;
> #size-cells = <0>;
> - i2c-mux-idle-disconnect;
[Severity: Medium]
Similarly here on the left bridge board, could we mention the removal of
the i2c-mux-idle-disconnect property in the commit message?
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260602-anacapa-devlop-phase-devicetree-v3-0-7c93c5df8d9b@gmail.com?part=8
next prev parent reply other threads:[~2026-06-02 14:00 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-02 13:24 [PATCH v3 0/9] ARM: dts: aspeed: anacapa: restructure devicetree for development-phase Colin Huang via B4 Relay
2026-06-02 13:24 ` [PATCH v3 1/9] dt-bindings: arm: aspeed: add Anacapa EVT1 EVT2 DVT board Colin Huang via B4 Relay
2026-06-02 16:20 ` Conor Dooley
2026-06-02 13:24 ` [PATCH v3 2/9] ARM: dts: aspeed: anacapa: add EVT1 devicetree and point wrapper to it Colin Huang via B4 Relay
2026-06-02 13:37 ` sashiko-bot
2026-06-02 13:24 ` [PATCH v3 3/9] ARM: dts: aspeed: anacapa: add EVT2 devicetree inheriting EVT1 Colin Huang via B4 Relay
2026-06-02 13:24 ` [PATCH v3 4/9] ARM: dts: aspeed: anacapa: add DVT devicetree inheriting EVT2 Colin Huang via B4 Relay
2026-06-02 13:25 ` [PATCH v3 5/9] ARM: dts: aspeed: anacapa: add additional EEPROM node for SCM Colin Huang via B4 Relay
2026-06-02 13:25 ` [PATCH v3 6/9] ARM: dts: aspeed: anacapa: Add eeprom device node for NFC adaptor board Colin Huang via B4 Relay
2026-06-02 13:25 ` [PATCH v3 7/9] ARM: dts: aspeed: anacapa: Align PDB fan GPIO numbering Colin Huang via B4 Relay
2026-06-02 13:25 ` [PATCH v3 8/9] ARM: dts: aspeed: anacapa: Enable MCTP and FRU for NIC Colin Huang via B4 Relay
2026-06-02 14:00 ` sashiko-bot [this message]
2026-06-02 13:25 ` [PATCH v3 9/9] ARM: dts: aspeed: anacapa: evt2: add shunt resistor values for HSC monitors Colin Huang via B4 Relay
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