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From: sashiko-bot@kernel.org
To: "Salih Erim" <salih.erim@amd.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v4 3/5] iio: adc: versal-sysmon: add I2C driver
Date: Sat, 06 Jun 2026 05:27:58 +0000	[thread overview]
Message-ID: <20260606052758.71C081F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260606051707.535281-4-salih.erim@amd.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Non-atomic I2C read transaction using separate send and receive operations.
--

commit 24169bf5c1143403f8ebc17ab9ebfd5e2fafa0c0
Author: Salih Erim <salih.erim@amd.com>

iio: adc: versal-sysmon: add I2C driver

Adds an I2C transport driver for the Versal SysMon block, allowing external
masters to read voltage and temperature measurements using the MMIO register
map. It implements read and write operations via an 8-byte command frame.

> diff --git a/drivers/iio/adc/versal-sysmon-i2c.c b/drivers/iio/adc/versal-sysmon-i2c.c
> new file mode 100644
> index 0000000000000..27a5ff4a35f68
> --- /dev/null
> +++ b/drivers/iio/adc/versal-sysmon-i2c.c

[ ... ]

> +static int sysmon_i2c_reg_read(void *context, unsigned int reg,
> +			       unsigned int *val)
> +{
> +	struct i2c_client *client = context;
> +	u8 write_buf[8] = { };
> +	u8 read_buf[4];
> +	int ret;
> +
> +	put_unaligned_le16(reg >> 2, &write_buf[SYSMON_I2C_REG_OFS]);
> +	write_buf[SYSMON_I2C_INSTR_OFS] = SYSMON_I2C_INSTR_READ;
> +
> +	ret = i2c_master_send(client, write_buf, sizeof(write_buf));
> +	if (ret < 0)
> +		return ret;
> +	if (ret != sizeof(write_buf))
> +		return -EIO;
> +
> +	ret = i2c_master_recv(client, read_buf, sizeof(read_buf));

[Severity: Medium]
Is it safe to split this read sequence into two distinct I2C transactions?

Using i2c_master_send() followed by i2c_master_recv() releases the adapter
lock and issues a stop condition between the two calls. While concurrent
accesses from this driver are serialized by the regmap lock, interleaving
transactions from other drivers on the same I2C bus could occur.

Should this use i2c_transfer() with an array of two i2c_msg structures to
perform an atomic transfer with a repeated start, or use i2c_lock_bus() if
the hardware requires a stop condition between the write and read phases?

> +	if (ret < 0)
> +		return ret;
> +	if (ret != sizeof(read_buf))
> +		return -EIO;
> +
> +	*val = get_unaligned_le32(read_buf);
> +
> +	return 0;
> +}

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260606051707.535281-1-salih.erim@amd.com?part=3

  reply	other threads:[~2026-06-06  5:27 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-06  5:17 [PATCH v4 0/5] iio: adc: add AMD/Xilinx Versal SysMon driver Salih Erim
2026-06-06  5:17 ` [PATCH v4 1/5] dt-bindings: iio: adc: add xlnx,versal-sysmon binding Salih Erim
2026-06-06  5:27   ` sashiko-bot
2026-06-06  5:17 ` [PATCH v4 2/5] iio: adc: add Versal SysMon driver Salih Erim
2026-06-06  5:17 ` [PATCH v4 3/5] iio: adc: versal-sysmon: add I2C driver Salih Erim
2026-06-06  5:27   ` sashiko-bot [this message]
2026-06-06  5:17 ` [PATCH v4 4/5] iio: adc: versal-sysmon: add threshold event support Salih Erim
2026-06-06  5:31   ` sashiko-bot
2026-06-06  5:17 ` [PATCH v4 5/5] iio: adc: versal-sysmon: add oversampling support Salih Erim
2026-06-06  5:30   ` sashiko-bot

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