[PATCH 0/2] Add APSS clock driver support for IPQ5210

[PATCH 0/2] Add APSS clock driver support for IPQ5210

[Varadarajan Narayanan]

IPQ5210 uses the HUAYRA pll for the APSS clock. This series adds support
for the APSS clock to change the CPU frequency to one of the supported
frequencies.

Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
---
Varadarajan Narayanan (2):
      dt-bindings: clock: qcom,a53pll: Add IPQ5210 compatible
      clk: qcom: apss-ipq-pll: Add IPQ5210 support

 .../devicetree/bindings/clock/qcom,a53pll.yaml        |  1 +
 drivers/clk/qcom/apss-ipq-pll.c                       | 19 +++++++++++++++++++
 2 files changed, 20 insertions(+)
---
base-commit: 533704f3c28c3f5f9e2542aa3a6a326c32e6f5c0
change-id: 20260625-apss-clk-ed39c40ed468
prerequisite-change-id: 20260515-tsens-802eef7a2cf6:v1
prerequisite-patch-id: 55c7e7f58ff80ecfed956707a9a893bbf59ef74b

Best regards,
-- 
Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>

[PATCH 1/2] dt-bindings: clock: qcom,a53pll: Add IPQ5210 compatible

[Varadarajan Narayanan]

Add the qcom,ipq5210-a53pll compatible for the A53 PLL found on IPQ5210
SoCs.

Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
---
 Documentation/devicetree/bindings/clock/qcom,a53pll.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
index 47ceab641a4c..1eec77e75a0a 100644
--- a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
@@ -17,6 +17,7 @@ properties:
   compatible:
     enum:
       - qcom,ipq5018-a53pll
+      - qcom,ipq5210-a53pll
       - qcom,ipq5332-a53pll
       - qcom,ipq6018-a53pll
       - qcom,ipq8074-a53pll

-- 
2.34.1

[PATCH 2/2] clk: qcom: apss-ipq-pll: Add IPQ5210 support

[Varadarajan Narayanan]

The Application Processor Subsystem on the IPQ5210 platform sources
its clock from the Huayra PLL. Add the configuration data necessary
to set it up.

Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
---
 drivers/clk/qcom/apss-ipq-pll.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
index 3a8987fe7008..569ac76c75dc 100644
--- a/drivers/clk/qcom/apss-ipq-pll.c
+++ b/drivers/clk/qcom/apss-ipq-pll.c
@@ -79,6 +79,18 @@ static const struct alpha_pll_config ipq5018_pll_config = {
 	.test_ctl_hi_val = 0x00400003,
 };
 
+static const struct alpha_pll_config ipq5210_pll_config = {
+	.l = 0x22,
+	.config_ctl_val = 0x4001075b,
+	.config_ctl_hi_val = 0x6,
+	.early_output_mask = BIT(3),
+	.aux2_output_mask = BIT(2),
+	.aux_output_mask = BIT(1),
+	.main_output_mask = BIT(0),
+	.test_ctl_val = 0x0,
+	.test_ctl_hi_val = 0x400003,
+};
+
 /* 1.080 GHz configuration */
 static const struct alpha_pll_config ipq5332_pll_config = {
 	.l = 0x2d,
@@ -140,6 +152,12 @@ static const struct apss_pll_data ipq5018_pll_data = {
 	.pll_config = &ipq5018_pll_config,
 };
 
+static struct apss_pll_data ipq5210_pll_data = {
+	.pll_type = CLK_ALPHA_PLL_TYPE_HUAYRA,
+	.pll = &ipq_pll_huayra,
+	.pll_config = &ipq5210_pll_config,
+};
+
 static const struct apss_pll_data ipq5332_pll_data = {
 	.pll_type = CLK_ALPHA_PLL_TYPE_STROMER_PLUS,
 	.pll = &ipq_pll_stromer_plus,
@@ -207,6 +225,7 @@ static int apss_ipq_pll_probe(struct platform_device *pdev)
 
 static const struct of_device_id apss_ipq_pll_match_table[] = {
 	{ .compatible = "qcom,ipq5018-a53pll", .data = &ipq5018_pll_data },
+	{ .compatible = "qcom,ipq5210-a53pll", .data = &ipq5210_pll_data },
 	{ .compatible = "qcom,ipq5332-a53pll", .data = &ipq5332_pll_data },
 	{ .compatible = "qcom,ipq6018-a53pll", .data = &ipq6018_pll_data },
 	{ .compatible = "qcom,ipq8074-a53pll", .data = &ipq8074_pll_data },

-- 
2.34.1

Re: [PATCH 2/2] clk: qcom: apss-ipq-pll: Add IPQ5210 support

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The struct `ipq5210_pll_data` is missing the `const` modifier.
--

commit 4658d262070dd0e2697e2fa6367ab1728d04bbf2
Author: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>

clk: qcom: apss-ipq-pll: Add IPQ5210 support

The Application Processor Subsystem on the IPQ5210 platform sources
its clock from the Huayra PLL. Add the configuration data necessary
to set it up.

> diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
> index 3a8987fe7008a..569ac76c75dc3 100644
> --- a/drivers/clk/qcom/apss-ipq-pll.c
> +++ b/drivers/clk/qcom/apss-ipq-pll.c
[ ... ]
> @@ -140,6 +152,12 @@ static const struct apss_pll_data ipq5018_pll_data = {
>  	.pll_config = &ipq5018_pll_config,
>  };
>  
> +static struct apss_pll_data ipq5210_pll_data = {

[Severity: Low]
This isn't a bug, but is it intentional that ipq5210_pll_data is missing
the const modifier here?

The other apss_pll_data structures (like ipq5018_pll_data and
ipq5332_pll_data) are declared as const, which allows them to be placed
in the read-only .rodata section.

> +	.pll_type = CLK_ALPHA_PLL_TYPE_HUAYRA,
> +	.pll = &ipq_pll_huayra,
> +	.pll_config = &ipq5210_pll_config,
> +};
> +
>  static const struct apss_pll_data ipq5332_pll_data = {

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260629-apss-clk-v1-0-8c92fe118ce4@oss.qualcomm.com?part=2

Re: [PATCH 0/2] Add APSS clock driver support for IPQ5210

[Krzysztof Kozlowski]

On Mon, Jun 29, 2026 at 10:08:41AM +0530, Varadarajan Narayanan wrote:
> IPQ5210 uses the HUAYRA pll for the APSS clock. This series adds support
> for the APSS clock to change the CPU frequency to one of the supported
> frequencies.
> 
> Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
> ---
> Varadarajan Narayanan (2):
>       dt-bindings: clock: qcom,a53pll: Add IPQ5210 compatible
>       clk: qcom: apss-ipq-pll: Add IPQ5210 support
> 
>  .../devicetree/bindings/clock/qcom,a53pll.yaml        |  1 +
>  drivers/clk/qcom/apss-ipq-pll.c                       | 19 +++++++++++++++++++
>  2 files changed, 20 insertions(+)
> ---
> base-commit: 533704f3c28c3f5f9e2542aa3a6a326c32e6f5c0
> change-id: 20260625-apss-clk-ed39c40ed468
> prerequisite-change-id: 20260515-tsens-802eef7a2cf6:v1
> prerequisite-patch-id: 55c7e7f58ff80ecfed956707a9a893bbf59ef74b

Really, how?

Best regards,
Krzysztof

Re: [PATCH 2/2] clk: qcom: apss-ipq-pll: Add IPQ5210 support

[Dmitry Baryshkov]

On Mon, Jun 29, 2026 at 10:08:43AM +0530, Varadarajan Narayanan wrote:
> The Application Processor Subsystem on the IPQ5210 platform sources
> its clock from the Huayra PLL. Add the configuration data necessary
> to set it up.
> 
> Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
> ---
>  drivers/clk/qcom/apss-ipq-pll.c | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>


-- 
With best wishes
Dmitry

Re: [PATCH 2/2] clk: qcom: apss-ipq-pll: Add IPQ5210 support

[Konrad Dybcio]

On 6/29/26 6:38 AM, Varadarajan Narayanan wrote:
> The Application Processor Subsystem on the IPQ5210 platform sources
> its clock from the Huayra PLL. Add the configuration data necessary
> to set it up.
> 
> Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

Re: [PATCH 0/2] Add APSS clock driver support for IPQ5210

[Varadarajan Narayanan]

On Mon, Jun 29, 2026 at 09:30:11AM +0200, Krzysztof Kozlowski wrote:
> On Mon, Jun 29, 2026 at 10:08:41AM +0530, Varadarajan Narayanan wrote:
> > IPQ5210 uses the HUAYRA pll for the APSS clock. This series adds support
> > for the APSS clock to change the CPU frequency to one of the supported
> > frequencies.
> >
> > Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
> > ---
> > Varadarajan Narayanan (2):
> >       dt-bindings: clock: qcom,a53pll: Add IPQ5210 compatible
> >       clk: qcom: apss-ipq-pll: Add IPQ5210 support
> >
> >  .../devicetree/bindings/clock/qcom,a53pll.yaml        |  1 +
> >  drivers/clk/qcom/apss-ipq-pll.c                       | 19 +++++++++++++++++++
> >  2 files changed, 20 insertions(+)
> > ---
> > base-commit: 533704f3c28c3f5f9e2542aa3a6a326c32e6f5c0
> > change-id: 20260625-apss-clk-ed39c40ed468
> > prerequisite-change-id: 20260515-tsens-802eef7a2cf6:v1
> > prerequisite-patch-id: 55c7e7f58ff80ecfed956707a9a893bbf59ef74b
>
> Really, how?

This patch is part of the series that enables cpufreq on ipq5210 that
enables APSS pll, then enables the mailbox, and finally the cpufreq
driver. While testing the cpufreq + thermal sensor throttling, needed
the tsens related patches (both functionally and for passing dtbs_check).

Will drop it and post v2.

Thanks
Varada

Re: [PATCH 0/2] Add APSS clock driver support for IPQ5210

[Krzysztof Kozlowski]

On 30/06/2026 09:27, Varadarajan Narayanan wrote:
> On Mon, Jun 29, 2026 at 09:30:11AM +0200, Krzysztof Kozlowski wrote:
>> On Mon, Jun 29, 2026 at 10:08:41AM +0530, Varadarajan Narayanan wrote:
>>> IPQ5210 uses the HUAYRA pll for the APSS clock. This series adds support
>>> for the APSS clock to change the CPU frequency to one of the supported
>>> frequencies.
>>>
>>> Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
>>> ---
>>> Varadarajan Narayanan (2):
>>>       dt-bindings: clock: qcom,a53pll: Add IPQ5210 compatible
>>>       clk: qcom: apss-ipq-pll: Add IPQ5210 support
>>>
>>>  .../devicetree/bindings/clock/qcom,a53pll.yaml        |  1 +
>>>  drivers/clk/qcom/apss-ipq-pll.c                       | 19 +++++++++++++++++++
>>>  2 files changed, 20 insertions(+)
>>> ---
>>> base-commit: 533704f3c28c3f5f9e2542aa3a6a326c32e6f5c0
>>> change-id: 20260625-apss-clk-ed39c40ed468
>>> prerequisite-change-id: 20260515-tsens-802eef7a2cf6:v1
>>> prerequisite-patch-id: 55c7e7f58ff80ecfed956707a9a893bbf59ef74b
>>
>> Really, how?
> 
> This patch is part of the series that enables cpufreq on ipq5210 that
> enables APSS pll, then enables the mailbox, and finally the cpufreq
> driver. While testing the cpufreq + thermal sensor throttling, needed

This is not what is expressed here. You wrote in cover letter
dependencies needed to build or apply this patchset.

By including random or irrelevant dependencies you only make review more
difficult (because I might need to consider now the dependency in this
patch) or introduce unnecessary obstacles for merging.


Best regards,
Krzysztof