[PATCH v5 0/2] spi: dt-bindings: snps,dw-apb-ssi: updates for RZ/N1D

[PATCH v5 0/2] spi: dt-bindings: snps,dw-apb-ssi: updates for RZ/N1D

[Wolfram Sang]

Since the actual DT additions are in -next now, here are the remaining
DT binding updates for the Renesas RZ/N1D SoC. Changes since v4 are
described in the individual patches.

A branch is here:

git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git renesas/n1d/enablement

Wolfram Sang (2):
  spi: dt-bindings: snps,dw-apb-ssi: drop duplicated RZ/N1 entry
  spi: dt-bindings: snps,dw-apb-ssi: add 'power-domains' property

 Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

-- 
2.51.0

[PATCH v5 1/2] spi: dt-bindings: snps,dw-apb-ssi: drop duplicated RZ/N1 entry

[Wolfram Sang]

Commit 164c05f03ffa ("spi: Convert DW SPI binding to DT schema") added
an RZ/N1 SoC family entry which was not in the original txt-file. It
doesn't follow the usual "<soc entry>, <soc family entry>" style for
Renesas SoCs. That was properly added later with commit 029d32a892a8
("spi: dw-apb-ssi: Integrate Renesas RZ/N1 SPI controller"). In that
commit, removing the old and bogus SoC family entry was overlooked, so
two SoC family entries were present. Remove the variant which should be
used as fallback while leaving the ABI documented.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---

Change since v4:
* reworded commit message to explain there is no ABI breakage because
  only a duplicated entry gets removed
* rebased to -next as of today
* added Geert's tag (Thanks!)

 Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 1 -
 1 file changed, 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
index 4458316326fc..447be88caf34 100644
--- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
+++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
@@ -50,7 +50,6 @@ properties:
           - enum:
               - mscc,ocelot-spi
               - mscc,jaguar2-spi
-              - renesas,rzn1-spi
               - sophgo,sg2042-spi
               - thead,th1520-spi
           - const: snps,dw-apb-ssi
-- 
2.51.0

[PATCH v5 2/2] spi: dt-bindings: snps,dw-apb-ssi: add 'power-domains' property

[Wolfram Sang]

This SPI controller likely belongs to a power domain for all the SoCs
listed. For sure, it belongs to one on the Renesas RZ/N1 SoC, so
enable the property to be able to describe its power domain in DTs.

Suggested-by: Herve Codina <herve.codina@bootlin.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Herve Codina <herve.codina@bootlin.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---

Change since v4:
* rebased to -next as of today
* added Geert's nad Krzysztof's tags (Thanks!)

 Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
index 447be88caf34..95a5bd894e93 100644
--- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
+++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
@@ -93,6 +93,9 @@ properties:
       - const: ssi_clk
       - const: pclk
 
+  power-domains:
+    maxItems: 1
+
   resets:
     maxItems: 1
 
-- 
2.51.0

Re: [PATCH v5 0/2] spi: dt-bindings: snps,dw-apb-ssi: updates for RZ/N1D

[Mark Brown]

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On Wed, Jul 01, 2026 at 03:12:48PM +0200, Wolfram Sang wrote:
> Since the actual DT additions are in -next now, here are the remaining
> DT binding updates for the Renesas RZ/N1D SoC. Changes since v4 are
> described in the individual patches.

This doesn't apply against current code, please check and resend.

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Re: [PATCH v5 1/2] spi: dt-bindings: snps,dw-apb-ssi: drop duplicated RZ/N1 entry

[Conor Dooley]

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Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: changes-requested
 (by mark)

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