[PATCH v2 0/2] Add APSS clock driver support for IPQ5210

[PATCH v2 0/2] Add APSS clock driver support for IPQ5210

[Varadarajan Narayanan]

IPQ5210 uses the HUAYRA pll for the APSS clock. This series adds support
for the APSS clock to change the CPU frequency to one of the supported
frequencies.

Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
---
Changes in v2:
- Remove incorrect tsens dependency
- Pick R-b tag for driver change
- Link to v1: https://lore.kernel.org/r/20260629-apss-clk-v1-0-8c92fe118ce4@oss.qualcomm.com

---
Varadarajan Narayanan (2):
      dt-bindings: clock: qcom,a53pll: Add IPQ5210 compatible
      clk: qcom: apss-ipq-pll: Add IPQ5210 support

 .../devicetree/bindings/clock/qcom,a53pll.yaml        |  1 +
 drivers/clk/qcom/apss-ipq-pll.c                       | 19 +++++++++++++++++++
 2 files changed, 20 insertions(+)
---
base-commit: 533704f3c28c3f5f9e2542aa3a6a326c32e6f5c0
change-id: 20260625-apss-clk-ed39c40ed468

Best regards,
-- 
Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>

[PATCH v2 1/2] dt-bindings: clock: qcom,a53pll: Add IPQ5210 compatible

[Varadarajan Narayanan]

Add the qcom,ipq5210-a53pll compatible for the A53 PLL found on IPQ5210
SoCs.

Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
---
 Documentation/devicetree/bindings/clock/qcom,a53pll.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
index 47ceab641a4c..1eec77e75a0a 100644
--- a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
@@ -17,6 +17,7 @@ properties:
   compatible:
     enum:
       - qcom,ipq5018-a53pll
+      - qcom,ipq5210-a53pll
       - qcom,ipq5332-a53pll
       - qcom,ipq6018-a53pll
       - qcom,ipq8074-a53pll

-- 
2.34.1

[PATCH v2 2/2] clk: qcom: apss-ipq-pll: Add IPQ5210 support

[Varadarajan Narayanan]

The Application Processor Subsystem on the IPQ5210 platform sources
its clock from the Huayra PLL. Add the configuration data necessary
to set it up.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
---
 drivers/clk/qcom/apss-ipq-pll.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
index 3a8987fe7008..569ac76c75dc 100644
--- a/drivers/clk/qcom/apss-ipq-pll.c
+++ b/drivers/clk/qcom/apss-ipq-pll.c
@@ -79,6 +79,18 @@ static const struct alpha_pll_config ipq5018_pll_config = {
 	.test_ctl_hi_val = 0x00400003,
 };
 
+static const struct alpha_pll_config ipq5210_pll_config = {
+	.l = 0x22,
+	.config_ctl_val = 0x4001075b,
+	.config_ctl_hi_val = 0x6,
+	.early_output_mask = BIT(3),
+	.aux2_output_mask = BIT(2),
+	.aux_output_mask = BIT(1),
+	.main_output_mask = BIT(0),
+	.test_ctl_val = 0x0,
+	.test_ctl_hi_val = 0x400003,
+};
+
 /* 1.080 GHz configuration */
 static const struct alpha_pll_config ipq5332_pll_config = {
 	.l = 0x2d,
@@ -140,6 +152,12 @@ static const struct apss_pll_data ipq5018_pll_data = {
 	.pll_config = &ipq5018_pll_config,
 };
 
+static struct apss_pll_data ipq5210_pll_data = {
+	.pll_type = CLK_ALPHA_PLL_TYPE_HUAYRA,
+	.pll = &ipq_pll_huayra,
+	.pll_config = &ipq5210_pll_config,
+};
+
 static const struct apss_pll_data ipq5332_pll_data = {
 	.pll_type = CLK_ALPHA_PLL_TYPE_STROMER_PLUS,
 	.pll = &ipq_pll_stromer_plus,
@@ -207,6 +225,7 @@ static int apss_ipq_pll_probe(struct platform_device *pdev)
 
 static const struct of_device_id apss_ipq_pll_match_table[] = {
 	{ .compatible = "qcom,ipq5018-a53pll", .data = &ipq5018_pll_data },
+	{ .compatible = "qcom,ipq5210-a53pll", .data = &ipq5210_pll_data },
 	{ .compatible = "qcom,ipq5332-a53pll", .data = &ipq5332_pll_data },
 	{ .compatible = "qcom,ipq6018-a53pll", .data = &ipq6018_pll_data },
 	{ .compatible = "qcom,ipq8074-a53pll", .data = &ipq8074_pll_data },

-- 
2.34.1

Re: [PATCH v2 2/2] clk: qcom: apss-ipq-pll: Add IPQ5210 support

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Missing 'const' qualifier on 'ipq5210_pll_data' structure.
--

commit 82121884055bac497befa1efc2a14f014cd9e6e1
Author: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>

clk: qcom: apss-ipq-pll: Add IPQ5210 support

The Application Processor Subsystem on the IPQ5210 platform sources
its clock from the Huayra PLL. Add the configuration data necessary
to set it up.

> diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
> index 3a8987fe7008a..569ac76c75dc3 100644
> --- a/drivers/clk/qcom/apss-ipq-pll.c
> +++ b/drivers/clk/qcom/apss-ipq-pll.c

[ ... ]

> @@ -140,6 +152,12 @@ static const struct apss_pll_data ipq5018_pll_data = {
>  	.pll_config = &ipq5018_pll_config,
>  };
>  
> +static struct apss_pll_data ipq5210_pll_data = {

[Severity: Low]
This isn't a bug, but should this structure be marked as const to match
the other apss_pll_data structs in this file? Without the const qualifier,
the structure gets placed in the mutable data section rather than rodata.

> +	.pll_type = CLK_ALPHA_PLL_TYPE_HUAYRA,
> +	.pll = &ipq_pll_huayra,
> +	.pll_config = &ipq5210_pll_config,
> +};
> +
>  static const struct apss_pll_data ipq5332_pll_data = {
>  	.pll_type = CLK_ALPHA_PLL_TYPE_STROMER_PLUS,
>  	.pll = &ipq_pll_stromer_plus,

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260701-apss-clk-v2-0-776d054ab8c3@oss.qualcomm.com?part=2

Re: [PATCH v2 2/2] clk: qcom: apss-ipq-pll: Add IPQ5210 support

[Krzysztof Kozlowski]

On Wed, Jul 01, 2026 at 07:15:33AM +0000, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Low] Missing 'const' qualifier on 'ipq5210_pll_data' structure.
> --
> 
> commit 82121884055bac497befa1efc2a14f014cd9e6e1
> Author: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
> 
> clk: qcom: apss-ipq-pll: Add IPQ5210 support
> 
> The Application Processor Subsystem on the IPQ5210 platform sources
> its clock from the Huayra PLL. Add the configuration data necessary
> to set it up.
> 
> > diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
> > index 3a8987fe7008a..569ac76c75dc3 100644
> > --- a/drivers/clk/qcom/apss-ipq-pll.c
> > +++ b/drivers/clk/qcom/apss-ipq-pll.c
> 
> [ ... ]
> 
> > @@ -140,6 +152,12 @@ static const struct apss_pll_data ipq5018_pll_data = {
> >  	.pll_config = &ipq5018_pll_config,
> >  };
> >  
> > +static struct apss_pll_data ipq5210_pll_data = {
> 
> [Severity: Low]
> This isn't a bug, but should this structure be marked as const to match

This is a bug.

I do not understand why existing code cannot be copied, but instead some
old deprecated syntax is pasted. Probably pasted from downstream crap
sources. Such way of working was scrutinized enough and if things do not
improve, well, this should be NAKed.

Best regards,
Krzysztof