Re: [PATCH 2/7] arm64: dts: mediatek: mt8173: Add and use UART AP_DMA controller

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Duplicate interrupt assignment (GIC_SPI 100) in the `apdma` node breaks UART3 RX DMA channel allocation.
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commit bbd069e5de2e64963276afa1f5a62fd9508627a3
Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

arm64: dts: mediatek: mt8173: Add and use UART AP_DMA controller

This commit adds the AP_DMA controller to the devicetree for mt8173 and
assigns the correct transmit and receive DMA channels to each of the four
UART controllers.

> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index 78c2ccd5be132..345098359aa58 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
[ ... ]
> @@ -673,6 +673,25 @@ gic: interrupt-controller@10221000 {
>  				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>  		};
>  
> +		apdma: dma-controller@11000300 {
> +			compatible = "mediatek,mt8173-uart-dma", "mediatek,mt6577-uart-dma";
> +			reg = <0 0x11000300 0 0x80>, <0 0x11000380 0 0x80>,
> +			      <0 0x11000400 0 0x80>, <0 0x11000480 0 0x80>,
> +			      <0 0x11000500 0 0x80>, <0 0x11000580 0 0x80>,
> +			      <0 0x11000600 0 0x80>, <0 0x11000680 0 0x80>;
> +			interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>,
> +				     <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>,
> +				     <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>,
> +				     <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>,
> +				     <GIC_SPI 99 IRQ_TYPE_LEVEL_LOW>,
> +				     <GIC_SPI 100 IRQ_TYPE_LEVEL_LOW>,
> +				     <GIC_SPI 101 IRQ_TYPE_LEVEL_LOW>,
> +				     <GIC_SPI 100 IRQ_TYPE_LEVEL_LOW>;
[Severity: Medium]
Is this intentional to reuse GIC_SPI 100 here? The 8th interrupt in this list
(for UART3 RX, channel 7) duplicates the 6th interrupt (UART2 RX, channel 5).

If the driver requests these IRQs without IRQF_SHARED, requesting the same
IRQ again for UART3 RX could fail with -EBUSY and prevent DMA initialization
for that channel. Should this be GIC_SPI 102 instead?

> +			clocks = <&pericfg CLK_PERI_AP_DMA>;
> +			#dma-cells = <1>;
> +			dma-requests = <8>;
> +		};
> +

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Sashiko AI review · https://sashiko.dev/#/patchset/20260701121929.19374-1-angelogioacchino.delregno@collabora.com?part=2