Re: [PATCH v5 2/5] arm64: dts: qcom: sm8550-qrd: add SPMI ADC channels and thermal nodes

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The patch relies on a missing device tree header file `qcom-adc5-gen3.h` and undefined parameterized macros for ADC channel definitions, causing a dtc syntax error and total build breakage.
--

commit 3bfb4c69433bbdcc629b30cb68184ebf16919c26
Author: Neil Armstrong <neil.armstrong@linaro.org>

arm64: dts: qcom: sm8550-qrd: add SPMI ADC channels and thermal nodes

Add the SPMI ADC channels on the PMK8550 SPMI5 ADC3 for the other PMICS
on the system. The thermal nodes are sorted by the sensor channel to be
coherent with the system thermal nodes ordering.

> diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
> index 2fb2e0be5e4c6..6812e45d65e78 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
[ ... ]
> @@ -997,27 +1083,218 @@ led@3 {
>  	};
>  };
>  
> +&pm8550_temp_alarm {
> +	io-channels = <&pmk8550_vadc ADC5_GEN3_DIE_TEMP(1)>;

[Severity: Low]
Does this rely on a missing device tree header file (qcom-adc5-gen3.h) and
undefined parameterized macros for the ADC channel definitions?

If the build falls back to a kernel-internal header where ADC5_GEN3_DIE_TEMP
is defined as a constant, this expands to something like 0x03(1), causing
a dtc syntax error and breaking the build.

> +	io-channel-names = "thermal";
> +};
> +
[ ... ]
> +	channel@701 {
> +		reg = <ADC5_GEN3_1P25VREF(7)>;
> +		label = "pm8550b_vref_1p25";
> +		qcom,pre-scaling = <1 1>;
> +	};
> +
> +	channel@703 {
> +		reg = <ADC5_GEN3_DIE_TEMP(7)>;

[Severity: Low]
Is this another instance where a missing parameterized macro is used to
calculate the ADC channel register, causing a dtc syntax error?

> +		label = "pm8550b_die_temp";
> +		qcom,pre-scaling = <1 1>;
> +	};
> +

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260702-topic-sm8x50-adc5-gen3-v5-0-8169953634ad@linaro.org?part=2