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From: sashiko-bot@kernel.org
To: "Manaf Meethalavalappu Pallikunhi" <manaf.pallikunhi@oss.qualcomm.com>
Cc: devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v3 2/4] dt-bindings: power: limits: Describe Qualcomm SPEL hardware
Date: Thu, 02 Jul 2026 17:30:03 +0000	[thread overview]
Message-ID: <20260702173003.C7FBD1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260702-qcom_spel_driver_upstream-v3-2-434d50f0c5b0@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The YAML `description` string will lose its structural formatting (specifically the bulleted list) because it is defined as a plain scalar.
--

commit 2a8dfbf8a7cefb27618383801964875a7eaac9ea
Author: Manaf Meethalavalappu Pallikunhi <manaf.pallikunhi@oss.qualcomm.com>

dt-bindings: power: limits: Describe Qualcomm SPEL hardware

This commit adds a DeviceTree binding to describe the Qualcomm SPEL
(SoC Power and Electrical Limits) hardware block. SPEL provides power
monitoring and limiting capabilities for various power domains in
Qualcomm SoCs.

> diff --git a/Documentation/devicetree/bindings/power/limits/qcom,glymur-spel.yaml b/Documentation/devicetree/bindings/power/limits/qcom,glymur-spel.yaml
> new file mode 100644
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/limits/qcom,glymur-spel.yaml

[ ... ]

> +maintainers:
> +  - Manaf Meethalavalappu Pallikunhi <manaf.pallikunhi@oss.qualcomm.com>
> +
> +description:

[Severity: Low]
This isn't a bug, but should this use the literal block scalar indicator
(description: |) to preserve the line breaks?

Because this is currently defined as a plain scalar, the YAML parser will fold
single newlines into spaces. This will cause the bulleted list below to
collapse into a single unformatted run-on sentence when the documentation
is generated by tools like dt_binding_check.

> +  The Qualcomm SPEL (SoC Power and Electrical Limits) is a hardware block that
> +  provides power monitoring and limiting capabilities for various power domains
> +  in Qualcomm SoCs.
> +
> +  SPEL enforces power consumption limits to prevent thermal overload, maintain
> +  system stability, and comply with platform power budgets. It provides
> +    - Hardware-enforced power capping with configurable power limits
> +    - Time window controls for power averaging
> +    - Energy counter monitoring for each power domain
> +    - Automatic throttling when power limits are exceeded

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260702-qcom_spel_driver_upstream-v3-0-434d50f0c5b0@oss.qualcomm.com?part=2

  reply	other threads:[~2026-07-02 17:30 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-02 17:22 [PATCH v3 0/4] Add Qualcomm SPEL powercap driver Manaf Meethalavalappu Pallikunhi
2026-07-02 17:22 ` [PATCH v3 1/4] dt-bindings: power: Add common power limit controller schema Manaf Meethalavalappu Pallikunhi
2026-07-02 17:44   ` sashiko-bot
2026-07-03  6:20   ` Krzysztof Kozlowski
2026-07-02 17:22 ` [PATCH v3 2/4] dt-bindings: power: limits: Describe Qualcomm SPEL hardware Manaf Meethalavalappu Pallikunhi
2026-07-02 17:30   ` sashiko-bot [this message]
2026-07-03  6:21   ` Krzysztof Kozlowski
2026-07-02 17:22 ` [PATCH v3 3/4] powercap: qcom: Add SPEL powercap driver Manaf Meethalavalappu Pallikunhi
2026-07-02 17:36   ` sashiko-bot
2026-07-03  6:24   ` Krzysztof Kozlowski
2026-07-02 17:22 ` [PATCH v3 4/4] arm64: dts: qcom: glymur: Enable " Manaf Meethalavalappu Pallikunhi

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