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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Cc: Rob Clark <robin.clark@oss.qualcomm.com>,
	Sean Paul <sean@poorly.run>,
	 Konrad Dybcio <konradybcio@kernel.org>,
	Dmitry Baryshkov <lumag@kernel.org>,
	 Abhinav Kumar <abhinav.kumar@linux.dev>,
	Jessica Zhang <jesszhan0024@gmail.com>,
	 Marijn Suijten <marijn.suijten@somainline.org>,
	David Airlie <airlied@gmail.com>,
	 Simona Vetter <simona@ffwll.ch>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	 Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	 Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	 Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	 "Joerg Roedel (AMD)" <joro@8bytes.org>,
	Puranam V G Tejaswi <puranam.tejaswi@oss.qualcomm.com>,
	 Abel Vesa <abel.vesa@oss.qualcomm.com>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	 freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev
Subject: Re: [PATCH 5/8] dt-bindings: display/msm: Document Adreno 722 GPU and GMU
Date: Mon, 6 Jul 2026 08:57:13 +0200	[thread overview]
Message-ID: <20260706-attractive-flawless-otter-fdc7d7@quoll> (raw)
In-Reply-To: <20260705-eliza-gpu-v1-5-c9f1354dbd29@oss.qualcomm.com>

On Sun, Jul 05, 2026 at 01:44:20PM +0530, Akhil P Oommen wrote:
> From: Puranam V G Tejaswi <puranam.tejaswi@oss.qualcomm.com>
> 
> Adreno 722 found in Eliza chipset belongs to the A7x Gen1 family. It is
> derived from A730 and shares the same IP-level configurations: HWCG
> registers, protected registers, GBIF CX registers and gmu_cgc_mode.
> Major differences include lower cache/core counts, 1MB GMEM, no
> Concurrent Binning & LPAC support. Some of the peripheral blocks like
> RSCC are from A740 that resulted in updates to RSC layout.
> 
> Update the dt-binding docs to document this GPU and GMU.
> 
> Signed-off-by: Puranam V G Tejaswi <puranam.tejaswi@oss.qualcomm.com>
> Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
> ---
>  Documentation/devicetree/bindings/display/msm/gmu.yaml | 1 +
>  Documentation/devicetree/bindings/display/msm/gpu.yaml | 1 +
>  2 files changed, 2 insertions(+)

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>

Best regards,
Krzysztof


  reply	other threads:[~2026-07-06  6:57 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-05  8:14 [PATCH 0/8] drm/msm: Support for Eliza GPU Akhil P Oommen
2026-07-05  8:14 ` [PATCH 1/8] drm/msm/a6xx: Fix RBBM_CLOCK_CNTL3_TP0 value in a730_hwcg Akhil P Oommen
2026-07-06  8:48   ` Konrad Dybcio
2026-07-05  8:14 ` [PATCH 2/8] drm/msm/a6xx: Rename GBIF_CX_CONFIG to a A6XX- variant register Akhil P Oommen
2026-07-06  8:49   ` Konrad Dybcio
2026-07-06 21:37   ` Dmitry Baryshkov
2026-07-05  8:14 ` [PATCH 3/8] drm/msm/a6xx: Add Adreno 722 support Akhil P Oommen
2026-07-06  8:59   ` Konrad Dybcio
2026-07-06 19:56     ` Akhil P Oommen
2026-07-05  8:14 ` [PATCH 4/8] dt-bindings: arm-smmu: Document GPU SMMU for Eliza SoC Akhil P Oommen
2026-07-06  6:56   ` Krzysztof Kozlowski
2026-07-05  8:14 ` [PATCH 5/8] dt-bindings: display/msm: Document Adreno 722 GPU and GMU Akhil P Oommen
2026-07-06  6:57   ` Krzysztof Kozlowski [this message]
2026-07-05  8:14 ` [PATCH 6/8] arm64: dts: qcom: eliza: Add GPU SMMU node Akhil P Oommen
2026-07-06 11:07   ` Konrad Dybcio
2026-07-06 11:08     ` Konrad Dybcio
2026-07-05  8:14 ` [PATCH 7/8] arm64: dts: qcom: eliza: Add GPU nodes Akhil P Oommen
2026-07-05  8:14 ` [PATCH 8/8] arm64: dts: qcom: eliza-mtp: Enable Adreno A722 GPU Akhil P Oommen
2026-07-06 22:23   ` Dmitry Baryshkov

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