Re: [PATCH v2 2/5] dt-bindings: arm: rockchip: Add Alientek DLRV1126

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The new board entry is not sorted alphabetically within `rockchip.yaml`.
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commit e33fe7223e96705f47efcf1b94f1097936d189f9
Author: Yanan He <grumpycat921013@gmail.com>

dt-bindings: arm: rockchip: Add Alientek DLRV1126

This commit adds device tree binding documentation for the Alientek DLRV1126 
carrier board and CLRV1126F core module, based on the Rockchip RV1126 SoC.

> diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
> index 1a9dde18626d0..9058f2a461d57 100644
> --- a/Documentation/devicetree/bindings/arm/rockchip.yaml
> +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
> @@ -162,6 +162,13 @@ properties:
>            - const: coolpi,pi-4b
>            - const: rockchip,rk3588s
>  
> +      - description: Alientek CLRV1126F SoM based boards

[Severity: Low]
This isn't a bug, but should this entry be sorted alphabetically? The list
appears to be maintained in alphabetical order by description, and "Alientek"
is being inserted here between "Cool Pi" and "Edgeble".

> +        items:
> +          - enum:
> +              - alientek,dlrv1126
> +          - const: alientek,clrv1126f
> +          - const: rockchip,rv1126
> +
>        - description: Edgeble Neural Compute Module 2(Neu2) SoM based boards
>          items:
>            - const: edgeble,neural-compute-module-2-io   # Edgeble Neural Compute Module 2 IO Board

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Sashiko AI review · https://sashiko.dev/#/patchset/20260706-rv1126-alientek-dlrv1126-v2-0-ff3176ca362b@gmail.com?part=2