Re: [PATCH v4 05/11] arm64: dts: qcom: x1e80100-crd: Add ov08x40 RGB sensor on CSIPHY4

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The DeviceTree graph uses an invalid downstream-style topology with a standalone `&csiphy4` node inserted between the `camss` node and the sensor.
--

--- Patch [5]: [PATCH v4 05/11] arm64: dts: qcom: x1e80100-crd: Add ov08x40 RGB sensor on CSIPHY4 ---
commit 39d25032ab99dc455f2a85ffdb943ee237d5ed9c
Author: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

arm64: dts: qcom: x1e80100-crd: Add ov08x40 RGB sensor on CSIPHY4

This commit defines the ov08x40 RGB sensor on cci1_i2c1. It configures the
sensor on the AON CCI pins connected to CSIPHY4 in four lane mode.

> diff --git a/arch/arm64/boot/dts/qcom/x1-crd.dtsi b/arch/arm64/boot/dts/qcom/x1-crd.dtsi
> --- a/arch/arm64/boot/dts/qcom/x1-crd.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1-crd.dtsi
> @@ -933,6 +934,85 @@ &gpu {
>  	status = "okay";
>  };
>  
> +&camss {
> +	status = "okay";
> +
> +	ports {
> +		/*
> +		 * port0 => csiphy0
> +		 * port1 => csiphy1
> +		 * port2 => csiphy2
> +		 * port3 => csiphy4
> +		 */
> +		port@3 {
> +			camss_csiphy4_inep: endpoint@0 {
> +				data-lanes = <0 1 2 3>;
> +				remote-endpoint = <&csiphy4_out_ep>;

[Severity: High]
Does this topology cause the CAMSS driver's V4L2 async notifier to hang
indefinitely?

When booting the kernel, the CAMSS driver parses the endpoints in the camss
node and uses v4l2_async_nf_add_fwnode_remote() to wait for a V4L2 subdevice
at the remote end of the graph.

Because this connects the endpoint to the csiphy4 node instead of the sensor,
and the generic PHY driver does not register its own V4L2 subdevice, the
notifier will never complete.

> +			};
> +		};
> +	};
> +};
> +

[ ... ]

> +&csiphy4 {
> +	vdda-0p8-supply = <&vreg_l2c_0p8>;
> +	vdda-1p2-supply = <&vreg_l1c_1p2>;
> +
> +	status = "okay";
> +
> +	ports {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		port@0 {
> +			reg = <0>;
> +			csiphy4_in_ep: endpoint {
> +				data-lanes = <0 1 2 3>;
> +				clock-lanes = <7>;
> +				remote-endpoint = <&ov08x40_out_ep>;
> +			};
> +		};
> +
> +		port@1 {
> +			reg = <1>;
> +			csiphy4_out_ep: endpoint {
> +				remote-endpoint = <&camss_csiphy4_inep>;

[Severity: High]
Is it intentional to place the PHY as a standalone node in the pipeline?

The upstream Linux CAMSS driver manages the PHY internally and does not
support inserting a standalone PHY node into the pipeline graph.

> +			};
> +		};
> +	};
> +};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260708-x1e-camss-csi2-phy-dtsi-v4-0-572348ad1b2a@linaro.org?part=5