From: sashiko-bot@kernel.org
To: lizhi2@eswincomputing.com
Cc: conor+dt@kernel.org, devicetree@vger.kernel.org, robh@kernel.org
Subject: Re: [PATCH net-next v10 2/4] dt-bindings: ethernet: eswin: add EIC7700 eth1 RX clock inversion variant
Date: Wed, 08 Jul 2026 06:43:23 +0000 [thread overview]
Message-ID: <20260708064324.45AA11F01559@smtp.kernel.org> (raw)
In-Reply-To: <20260707064159.1299-1-lizhi2@eswincomputing.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The 'rx-internal-delay-ps' and 'tx-internal-delay-ps' properties were removed from the schema's 'required' list and examples, but the platform driver still strictly requires them, causing predictable boot failures for device trees following the updated schema.
--
--- Patch [2]: [PATCH net-next v10 2/4] dt-bindings: ethernet: eswin: add EIC7700 eth1 RX clock inversion variant ---
commit 2e11e791f4a16ddedd931815efa250107b187a70
Author: Zhi Li <lizhi2@eswincomputing.com>
dt-bindings: ethernet: eswin: add EIC7700 eth1 RX clock inversion variant
This commit introduces a new compatible string for the EIC7700 eth1 MAC to
handle RX clock inversion. It also models the TX internal delay as a base
range and updates constraints based on the compatible string.
> diff --git a/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml b/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
> index 4e02fedae5c67..ba49fd6a086cb 100644
> --- a/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
> +++ b/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
[ ... ]
> @@ -140,3 +161,29 @@ examples:
> snps,wr_osr_lmt = <2>;
> };
> };
> +
> + ethernet@50410000 {
> + compatible = "eswin,eic7700-qos-eth-clk-inversion", "snps,dwmac-5.20";
> + reg = <0x50410000 0x10000>;
> + interrupt-parent = <&plic>;
> + interrupts = <70>;
> + interrupt-names = "macirq";
> + clocks = <&d0_clock 186>, <&d0_clock 171>, <&d0_clock 40>,
> + <&d0_clock 194>;
> + clock-names = "axi", "cfg", "stmmaceth", "tx";
> + resets = <&reset 94>;
> + reset-names = "stmmaceth";
> + eswin,hsp-sp-csr = <&hsp_sp_csr 0x200 0x208 0x218 0x214 0x21c>;
> + phy-handle = <&gmac1_phy0>;
> + phy-mode = "rgmii-id";
> + snps,aal;
> + snps,fixed-burst;
> + snps,tso;
> + snps,axi-config = <&stmmac_axi_setup_gmac1>;
> +
> + stmmac_axi_setup_gmac1: stmmac-axi-config {
> + snps,blen = <0 0 0 0 16 8 4>;
> + snps,rd_osr_lmt = <2>;
> + snps,wr_osr_lmt = <2>;
> + };
> + };
[Severity: Medium]
Will this example cause a probe failure if copied by device tree authors?
The new example omits the tx-internal-delay-ps and rx-internal-delay-ps
properties, but the platform driver rigidly enforces their presence:
drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c:eic7700_dwmac_probe() {
...
} else {
return dev_err_probe(&pdev->dev, -EINVAL,
"missing required property tx-internal-delay-ps\n");
}
...
}
If someone uses this example as a template, it looks like eic7700_dwmac_probe()
will unconditionally return -EINVAL during boot. Does the driver need to be
updated to handle these missing properties, or should the delay properties be
added back to this example?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260707064033.1265-1-lizhi2@eswincomputing.com?part=2
next prev parent reply other threads:[~2026-07-08 6:43 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-07 6:40 [PATCH net-next v10 0/4] net: stmmac: eic7700: add eth1 variant support and update delay bindings lizhi2
2026-07-07 6:41 ` [PATCH net-next v10 1/4] dt-bindings: ethernet: eswin: relax internal delay model to range-based constraints lizhi2
2026-07-08 6:43 ` sashiko-bot
2026-07-10 2:46 ` 李志
2026-07-07 6:41 ` [PATCH net-next v10 2/4] dt-bindings: ethernet: eswin: add EIC7700 eth1 RX clock inversion variant lizhi2
2026-07-08 6:43 ` sashiko-bot [this message]
2026-07-07 6:42 ` [PATCH net-next v10 3/4] net: stmmac: eic7700: make RGMII delay properties optional lizhi2
2026-07-07 6:42 ` [PATCH net-next v10 4/4] net: stmmac: eic7700: add support for eth1 clock inversion variant lizhi2
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