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From: sashiko-bot@kernel.org
To: "Michal Simek" <michal.simek@amd.com>
Cc: conor+dt@kernel.org, robh@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v5 5/5] arm64: versal-net: Switch Versal NET to firmware clock interface
Date: Wed, 08 Jul 2026 13:30:21 +0000	[thread overview]
Message-ID: <20260708133021.CC9DE1F00A3F@smtp.kernel.org> (raw)
In-Reply-To: <77e6234f6cef3f78fb1c6c97142fa8055982e14e.1783516336.git.michal.simek@amd.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Duplication of dt-bindings headers into arch/arm64/boot/dts/xilinx/ instead of include/dt-bindings/.
--

--- Patch [5]: [PATCH v5 5/5] arm64: versal-net: Switch Versal NET to firmware clock interface ---
commit 49b1e2cd1b89d937b21ae992159666e14683c5d0
Author: Michal Simek <michal.simek@amd.com>

arm64: versal-net: Switch Versal NET to firmware clock interface

This commit switches Versal NET from using fixed clocks to the
firmware-based clock interface via versal-net-clk.dtsi. It also adds new
DT macro headers for Versal NET and base Versal clocks, power domains,
and mandatory resets required by the clock dtsi.

[ ... ]

> diff --git a/arch/arm64/boot/dts/xilinx/xlnx-versal-clk.h b/arch/arm64/boot/dts/xilinx/xlnx-versal-clk.h
> new file mode 100644
> index 0000000000000..d0c4abf78f307
> --- /dev/null
> +++ b/arch/arm64/boot/dts/xilinx/xlnx-versal-clk.h
> @@ -0,0 +1,123 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2019 - 2022, Xilinx, Inc.
> + * Copyright (C) 2022 - 2026, Advanced Micro Devices, Inc.
> + */
> +
> +#ifndef _XLNX_VERSAL_CLK_H
> +#define _XLNX_VERSAL_CLK_H

[Severity: Low]
Should these device tree binding headers (like xlnx-versal-clk.h and
xlnx-versal-power.h) be placed in include/dt-bindings/ instead of the
architecture-specific DTS directory? Placing them in the arch directory
prevents drivers from easily including them and diverges from the standard
kernel tree layout for device tree bindings.

[ ... ]

> diff --git a/arch/arm64/boot/dts/xilinx/xlnx-versal-resets.h b/arch/arm64/boot/dts/xilinx/xlnx-versal-resets.h
> new file mode 100644
> index 0000000000000..fe00f4a0ba65b
> --- /dev/null
> +++ b/arch/arm64/boot/dts/xilinx/xlnx-versal-resets.h
> @@ -0,0 +1,106 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2020 - 2022, Xilinx, Inc.
> + * Copyright (C) 2022 - 2026, Advanced Micro Devices, Inc.
> + */
> +
> +#ifndef _XLNX_VERSAL_RESETS_H
> +#define _XLNX_VERSAL_RESETS_H

[Severity: Low]
Does this file need to be added here? It appears this newly added file is
an exact duplicate of the existing
include/dt-bindings/reset/xlnx-versal-resets.h.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1783516336.git.michal.simek@amd.com?part=5

      reply	other threads:[~2026-07-08 13:30 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-08 13:12 [PATCH v5 0/5] clock: versal-clk: Fix Versal NET clock binding and switch to CCF Michal Simek
2026-07-08 13:12 ` [PATCH v5 1/5] dt-bindings: firmware: xilinx: Add missing example for ZynqMP Michal Simek
2026-07-08 13:12 ` [PATCH v5 2/5] dt-bindings: clock: versal-clk: Fix mio_clk index range in clock-names pattern Michal Simek
2026-07-08 13:23   ` sashiko-bot
2026-07-08 13:12 ` [PATCH v5 3/5] dt-bindings: clock: Move xlnx,zynqmp-clk to its own schema Michal Simek
2026-07-08 13:12 ` [PATCH v5 4/5] dt-bindings: clock: versal-clk: Fix Versal NET clock validation Michal Simek
2026-07-08 13:12 ` [PATCH v5 5/5] arm64: versal-net: Switch Versal NET to firmware clock interface Michal Simek
2026-07-08 13:30   ` sashiko-bot [this message]

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