From: sashiko-bot@kernel.org
To: "Cristian Ciocaltea" <cristian.ciocaltea@collabora.com>
Cc: conor+dt@kernel.org, dri-devel@lists.freedesktop.org,
robh@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v3 06/14] drm/rockchip: vop2: Fix VOP2_MAX_DCLK_RATE overflow on 32-bit
Date: Wed, 08 Jul 2026 22:06:55 +0000 [thread overview]
Message-ID: <20260708220655.B323E1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260709-dw-hdmi-qp-yuv-v3-6-a4a982a9f2e7@collabora.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] The driver calls multiple sleeping functions from CRTC atomic enable, disable, and flush callbacks, violating DRM atomic context rules.
--
--- Patch [6]: [PATCH v3 06/14] drm/rockchip: vop2: Fix VOP2_MAX_DCLK_RATE overflow on 32-bit ---
commit 4edf4257240708c6864fcd134b29f53d0456d685
Author: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
drm/rockchip: vop2: Fix VOP2_MAX_DCLK_RATE overflow on 32-bit
VOP2_MAX_DCLK_RATE is defined as an unsigned long and is used scaled by
the color-depth ratio. On 32-bit architectures, this can overflow when
multiplied. This patch changes the constant to unsigned long long to ensure
64-bit arithmetic is used.
Link: https://lore.kernel.org/all/20260623203310.9F8C81F000E9@smtp.kernel.org/
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> index e9f5d015b6458..2cd04bedaa2c0 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> @@ -102,7 +102,7 @@ enum vop2_afbc_format {
> VOP2_AFBC_FMT_INVALID = -1,
> };
>
> -#define VOP2_MAX_DCLK_RATE 600000000UL
> +#define VOP2_MAX_DCLK_RATE 600000000ULL
[Severity: High]
This is a pre-existing issue, but I noticed some potential atomic context
violations in this file.
During non-blocking commits, the DRM core invokes CRTC callbacks like
vop2_crtc_atomic_enable(), vop2_crtc_atomic_disable(), and
vop2_crtc_atomic_flush(). These run in an atomic context where sleeping is
strictly forbidden.
However, the driver appears to invoke sleeping functions on these paths.
For example, in vop2_crtc_atomic_enable():
vop2_lock(vop2);
...
ret = clk_prepare_enable(vp->dclk);
Similarly, in vop2_crtc_atomic_disable():
vop2_lock(vop2);
And in the flush path via vop2_crtc_atomic_try_set_gamma_locked():
vop2_lock(vop2);
Because vop2_lock() acquires a mutex and clk_prepare_enable() can sleep,
does this violate the atomic context requirement and potentially cause system
instability or deadlocks during display state updates?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260709-dw-hdmi-qp-yuv-v3-0-a4a982a9f2e7@collabora.com?part=6
next prev parent reply other threads:[~2026-07-08 22:06 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-08 21:57 [PATCH v3 00/14] Support 10-bit YUV422 and 8/10-bit YUV420 color format on DW HDMI QP Cristian Ciocaltea
2026-07-08 21:57 ` [PATCH v3 01/14] dt-bindings: display: vop2: Add missing reset properties Cristian Ciocaltea
2026-07-08 21:57 ` [PATCH v3 02/14] drm/rockchip: vop2: Fix resource leak on vop2_enable() error path Cristian Ciocaltea
2026-07-08 22:07 ` sashiko-bot
2026-07-08 21:57 ` [PATCH v3 03/14] drm/rockchip: vop2: Balance state on atomic_enable() error paths Cristian Ciocaltea
2026-07-08 22:07 ` sashiko-bot
2026-07-08 21:57 ` [PATCH v3 04/14] drm/rockchip: vop2: Send pending event when atomic_enable() fails Cristian Ciocaltea
2026-07-08 21:57 ` [PATCH v3 05/14] drm/rockchip: vop2: Avoid division by zero when computing max_dclk Cristian Ciocaltea
2026-07-08 22:07 ` sashiko-bot
2026-07-08 21:57 ` [PATCH v3 06/14] drm/rockchip: vop2: Fix VOP2_MAX_DCLK_RATE overflow on 32-bit Cristian Ciocaltea
2026-07-08 22:06 ` sashiko-bot [this message]
2026-07-08 21:57 ` [PATCH v3 07/14] drm/rockchip: vop2: Reset AXI and DCLK to improve robustness Cristian Ciocaltea
2026-07-08 22:10 ` sashiko-bot
2026-07-08 21:57 ` [PATCH v3 08/14] drm/rockchip: vop2: Avoid DCLK source switch for 10-bit YUV422 output Cristian Ciocaltea
2026-07-08 21:57 ` [PATCH v3 09/14] drm/rockchip: vop2: Consolidate HDMI PHY PLL clock parent switch Cristian Ciocaltea
2026-07-08 21:57 ` [PATCH v3 10/14] drm/rockchip: vop2: Switch to enum vop_csc_format Cristian Ciocaltea
2026-07-08 21:57 ` [PATCH v3 11/14] drm/bridge: dw-hdmi-qp: Log resolution and refresh rate in atomic_enable() Cristian Ciocaltea
2026-07-08 21:57 ` [PATCH v3 12/14] drm/rockchip: dw_hdmi_qp: Support 10-bit YUV422 output format Cristian Ciocaltea
2026-07-08 22:13 ` sashiko-bot
2026-07-08 21:57 ` [PATCH v3 13/14] drm/rockchip: dw_hdmi_qp: Enable YUV420 " Cristian Ciocaltea
2026-07-08 22:15 ` sashiko-bot
2026-07-08 21:57 ` [PATCH v3 14/14] arm64: dts: rockchip: Add RK3588 VOP2 resets Cristian Ciocaltea
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