Re: [RFC PATCH 07/11] arm64: dts: qcom: hamoa: Move Iris IOMMUs to sub nodes

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The `iommu-addresses` property is incorrectly used to limit the non-pixel stream's IOVA space. Instead of restricting allocations to the 0-600 MB range, it marks the range as an IOMMU reservation (`IOMMU_RESV_RESERVED`), which forces the allocator to skip it and allocate IOVAs above 600 MB, directly violating hardware constraints.
--

--- Patch [7]: [RFC PATCH 07/11] arm64: dts: qcom: hamoa: Move Iris IOMMUs to sub nodes ---
commit 96b940efc5fae7db37d762be78144fc901472a7b
Author: Vikash Garodia <vikash.garodia@oss.qualcomm.com>

arm64: dts: qcom: hamoa: Move Iris IOMMUs to sub nodes

This commit splits the Iris VPU into non-pixel and pixel sub-nodes to
describe separate IOVA constraints. It uses a reserved memory region with
iommu-addresses to attempt limiting the non-pixel stream to the 0-600 MB
range.

> diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
> --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
> +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
> @@ -657,6 +657,10 @@ smem_mem: smem@ffe00000 {
>  			hwlocks = <&tcsr_mutex 3>;
>  			no-map;
>  		};
> +
> +		iris_resv: reservation-iris {
> +			iommu-addresses = <&iris_non_pixel 0x0 0x0 0x0 0x25800000>;
> +		};

[Severity: High]
Does this iommu-addresses property actually restrict allocations to the
0-600 MB range, or does it do the exact opposite?

Because this reservation node lacks a physical reg property,
of_iommu_get_resv_regions() parses it as an IOMMU_RESV_RESERVED region.
When iova_reserve_iommu_regions() processes this, it permanently blocks
the 0-600 MB range from the device's IOVA allocator.

Could this force the allocator to fall back to IOVAs above 600 MB (or
fail entirely), directly violating the hardware constraint and leading to
the device crashes mentioned in the commit message?

>  	};
>  
[ ... ]
> @@ -5446,6 +5451,15 @@ &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
>  			 */
>  			status = "disabled";
>  
> +			iris_non_pixel: non-pixel {
> +				iommus = <&apps_smmu 0x1940 0x0>;
> +				memory-region = <&iris_resv>;
> +			};
> +
> +			iris_pixel: pixel {
> +				iommus = <&apps_smmu 0x1947 0x0>;
> +			};
> +

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260709-vpu_iommu_iova_handling-v1-0-72bb62cb2dfd@oss.qualcomm.com?part=7