* [PATCH v6 1/5] dt-bindings: arm: coresight-tnoc: Bind on platform bus instead of AMBA
2026-07-10 2:38 [PATCH v6 0/5] Fix traceNoC probe issue on multiple QCOM platforms Jie Gan
@ 2026-07-10 2:39 ` Jie Gan
2026-07-10 2:48 ` sashiko-bot
2026-07-10 7:03 ` Krzysztof Kozlowski
2026-07-10 2:39 ` [PATCH v6 2/5] coresight: tnoc: Bind Aggregator TNOC on the platform bus Jie Gan
` (3 subsequent siblings)
4 siblings, 2 replies; 14+ messages in thread
From: Jie Gan @ 2026-07-10 2:39 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Tingwei Zhang, Jingyi Wang, Jie Gan, Abel Vesa,
Suzuki K Poulose, Mike Leach, James Clark, Leo Yan,
Yuanfang Zhang, Abel Vesa, Alexander Shishkin
Cc: Konrad Dybcio, linux-arm-msm, devicetree, linux-kernel, coresight,
linux-arm-kernel
The Aggregator TraceNoC hardware exposes CID registers, but the Component
ID value returned by the hardware is 0x00000000 instead of a valid AMBA
Component ID. As a result, the device cannot be identified on the AMBA
bus.
Describe the Aggregator TraceNoC with a dedicated single
"qcom,coresight-tnoc" compatible instead of the two-string AMBA form
"qcom,coresight-tnoc", "arm,primecell". This creates the device on the
platform bus so it is bound by the platform driver through its compatible
string rather than as an AMBA device.
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
.../devicetree/bindings/arm/qcom,coresight-tnoc.yaml | 16 ++--------------
1 file changed, 2 insertions(+), 14 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
index ef648a15b806..72fb1210e22e 100644
--- a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
@@ -22,24 +22,12 @@ description: >
Note this binding is specifically intended for Aggregator TNOC instances.
-# Need a custom select here or 'arm,primecell' will match on lots of nodes
-select:
- properties:
- compatible:
- contains:
- enum:
- - qcom,coresight-tnoc
- required:
- - compatible
-
properties:
$nodename:
pattern: "^tn(@[0-9a-f]+)$"
compatible:
- items:
- - const: qcom,coresight-tnoc
- - const: arm,primecell
+ const: qcom,coresight-tnoc
reg:
maxItems: 1
@@ -83,7 +71,7 @@ additionalProperties: false
examples:
- |
tn@109ab000 {
- compatible = "qcom,coresight-tnoc", "arm,primecell";
+ compatible = "qcom,coresight-tnoc";
reg = <0x109ab000 0x4200>;
clocks = <&aoss_qmp>;
--
2.34.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v6 1/5] dt-bindings: arm: coresight-tnoc: Bind on platform bus instead of AMBA
2026-07-10 2:39 ` [PATCH v6 1/5] dt-bindings: arm: coresight-tnoc: Bind on platform bus instead of AMBA Jie Gan
@ 2026-07-10 2:48 ` sashiko-bot
2026-07-10 7:03 ` Krzysztof Kozlowski
1 sibling, 0 replies; 14+ messages in thread
From: sashiko-bot @ 2026-07-10 2:48 UTC (permalink / raw)
To: Jie Gan; +Cc: robh, devicetree, conor+dt
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The kernel has no platform driver configured to match the `qcom,coresight-tnoc` compatible string, leaving the device unbound on the platform bus.
- [Low] Restricting the 'compatible' property to a single string abruptly breaks schema validation for existing in-tree device trees that use the dual-string AMBA format.
--
--- Patch [1]: [PATCH v6 1/5] dt-bindings: arm: coresight-tnoc: Bind on platform bus instead of AMBA ---
commit 53696bf96bfa353e6c866bb916cba6363324a355
Author: Jie Gan <jie.gan@oss.qualcomm.com>
dt-bindings: arm: coresight-tnoc: Bind on platform bus instead of AMBA
The Aggregator TraceNoC hardware exposes CID registers, but the Component
ID value returned by the hardware is 0x00000000 instead of a valid AMBA
Component ID. As a result, the device cannot be identified on the AMBA
bus.
> Describe the Aggregator TraceNoC with a dedicated single
> "qcom,coresight-tnoc" compatible instead of the two-string AMBA form
> "qcom,coresight-tnoc", "arm,primecell". This creates the device on the
> platform bus so it is bound by the platform driver through its compatible
> string rather than as an AMBA device.
[Severity: High]
Does the platform driver have the correct compatible string to match this?
Looking at itnoc_of_match in drivers/hwtracing/coresight/coresight-tnoc.c:
static const struct of_device_id itnoc_of_match[] = {
{ .compatible = "qcom,coresight-itnoc" },
{}
};
Since "qcom,coresight-tnoc" is not in this match table, will the device
silently fail to probe at runtime on the platform bus?
> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
> index ef648a15b8065..72fb1210e22e0 100644
> --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
[ ... ]
> @@ -22,24 +22,12 @@ description: >
>
> Note this binding is specifically intended for Aggregator TNOC instances.
>
> -# Need a custom select here or 'arm,primecell' will match on lots of nodes
> -select:
> - properties:
> - compatible:
> - contains:
> - enum:
> - - qcom,coresight-tnoc
> - required:
> - - compatible
> -
> properties:
> $nodename:
> pattern: "^tn(@[0-9a-f]+)$"
>
> compatible:
> - items:
> - - const: qcom,coresight-tnoc
> - - const: arm,primecell
> + const: qcom,coresight-tnoc
[Severity: Low]
Will this break schema validation for existing device trees?
Existing files like arch/arm64/boot/dts/qcom/sm8750.dtsi still use the dual
string format:
tn@109ab000 {
compatible = "qcom,coresight-tnoc", "arm,primecell";
Running make dtbs_check might produce validation errors until those device
trees are updated to match this new strict constraint.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260710-fix-tracenoc-probe-issue-v6-0-41eb36fef8d9@oss.qualcomm.com?part=1
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v6 1/5] dt-bindings: arm: coresight-tnoc: Bind on platform bus instead of AMBA
2026-07-10 2:39 ` [PATCH v6 1/5] dt-bindings: arm: coresight-tnoc: Bind on platform bus instead of AMBA Jie Gan
2026-07-10 2:48 ` sashiko-bot
@ 2026-07-10 7:03 ` Krzysztof Kozlowski
1 sibling, 0 replies; 14+ messages in thread
From: Krzysztof Kozlowski @ 2026-07-10 7:03 UTC (permalink / raw)
To: Jie Gan
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Tingwei Zhang, Jingyi Wang, Abel Vesa,
Suzuki K Poulose, Mike Leach, James Clark, Leo Yan,
Yuanfang Zhang, Abel Vesa, Alexander Shishkin, Konrad Dybcio,
linux-arm-msm, devicetree, linux-kernel, coresight,
linux-arm-kernel
On Fri, Jul 10, 2026 at 10:39:00AM +0800, Jie Gan wrote:
> The Aggregator TraceNoC hardware exposes CID registers, but the Component
> ID value returned by the hardware is 0x00000000 instead of a valid AMBA
> Component ID. As a result, the device cannot be identified on the AMBA
> bus.
>
> Describe the Aggregator TraceNoC with a dedicated single
> "qcom,coresight-tnoc" compatible instead of the two-string AMBA form
> "qcom,coresight-tnoc", "arm,primecell". This creates the device on the
> platform bus so it is bound by the platform driver through its compatible
> string rather than as an AMBA device.
>
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
> .../devicetree/bindings/arm/qcom,coresight-tnoc.yaml | 16 ++--------------
> 1 file changed, 2 insertions(+), 14 deletions(-)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v6 2/5] coresight: tnoc: Bind Aggregator TNOC on the platform bus
2026-07-10 2:38 [PATCH v6 0/5] Fix traceNoC probe issue on multiple QCOM platforms Jie Gan
2026-07-10 2:39 ` [PATCH v6 1/5] dt-bindings: arm: coresight-tnoc: Bind on platform bus instead of AMBA Jie Gan
@ 2026-07-10 2:39 ` Jie Gan
2026-07-10 2:50 ` sashiko-bot
2026-07-10 8:40 ` Leo Yan
2026-07-10 2:39 ` [PATCH v6 3/5] arm64: dts: qcom: kaanapali: bind traceNoC " Jie Gan
` (2 subsequent siblings)
4 siblings, 2 replies; 14+ messages in thread
From: Jie Gan @ 2026-07-10 2:39 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Tingwei Zhang, Jingyi Wang, Jie Gan, Abel Vesa,
Suzuki K Poulose, Mike Leach, James Clark, Leo Yan,
Yuanfang Zhang, Abel Vesa, Alexander Shishkin
Cc: Konrad Dybcio, linux-arm-msm, devicetree, linux-kernel, coresight,
linux-arm-kernel
The Aggregator TNOC is bound as an AMBA device through the
"qcom,coresight-tnoc", "arm,primecell" compatible. The AMBA bus reads the
peripheral and component ID registers to identify and probe the device.
Although the Aggregator TNOC exposes the CID registers, the Component ID
value returned by the hardware is 0x00000000 instead of a valid AMBA
Component ID, so the AMBA match fails and the device never comes up.
Bind the Aggregator TNOC on the platform bus instead, where the device is
matched by its compatible string and no component-ID probing is performed.
Add "qcom,coresight-tnoc" to the platform driver's match table, and rename
the platform driver and its callbacks from the "itnoc"-specific names to
generic "tnoc" names, since the driver now serves both the Interconnect
and Aggregator TNOC. Update the platform driver name to "coresight-tnoc"
accordingly.
The ATID-unsupported handling keyed off dev_is_amba(), which disabled ATID
allocation for every platform-bus device. With the Aggregator TNOC now on
the platform bus, that check would wrongly disable its ATID, even though
the Aggregator TNOC owns the ATID that tags the whole aggregation path.
The Interconnect TNOC aggregates trace within its subsystem but carries no
ATID of its own, because the downstream Aggregator TNOC already owns the
ATID for the path. So base the check on the "qcom,coresight-itnoc"
compatible and let every other form allocate a trace ID.
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
drivers/hwtracing/coresight/coresight-tnoc.c | 37 +++++++++++++++-------------
1 file changed, 20 insertions(+), 17 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-tnoc.c b/drivers/hwtracing/coresight/coresight-tnoc.c
index 9e8de4323d28..737cc802aefe 100644
--- a/drivers/hwtracing/coresight/coresight-tnoc.c
+++ b/drivers/hwtracing/coresight/coresight-tnoc.c
@@ -130,7 +130,7 @@ static int trace_noc_init_default_data(struct trace_noc_drvdata *drvdata)
{
int atid;
- if (!dev_is_amba(drvdata->dev)) {
+ if (of_device_is_compatible(drvdata->dev->of_node, "qcom,coresight-itnoc")) {
drvdata->atid = -EOPNOTSUPP;
return 0;
}
@@ -278,7 +278,7 @@ static struct amba_driver trace_noc_driver = {
.id_table = trace_noc_ids,
};
-static int itnoc_probe(struct platform_device *pdev)
+static int tnoc_platform_probe(struct platform_device *pdev)
{
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
int ret;
@@ -295,16 +295,18 @@ static int itnoc_probe(struct platform_device *pdev)
return ret;
}
-static void itnoc_remove(struct platform_device *pdev)
+static void tnoc_platform_remove(struct platform_device *pdev)
{
struct trace_noc_drvdata *drvdata = platform_get_drvdata(pdev);
coresight_unregister(drvdata->csdev);
pm_runtime_disable(&pdev->dev);
+ if (drvdata->atid > 0)
+ coresight_trace_id_put_system_id(drvdata->atid);
}
#ifdef CONFIG_PM
-static int itnoc_runtime_suspend(struct device *dev)
+static int tnoc_runtime_suspend(struct device *dev)
{
struct trace_noc_drvdata *drvdata = dev_get_drvdata(dev);
@@ -313,7 +315,7 @@ static int itnoc_runtime_suspend(struct device *dev)
return 0;
}
-static int itnoc_runtime_resume(struct device *dev)
+static int tnoc_runtime_resume(struct device *dev)
{
struct trace_noc_drvdata *drvdata = dev_get_drvdata(dev);
@@ -321,35 +323,36 @@ static int itnoc_runtime_resume(struct device *dev)
}
#endif
-static const struct dev_pm_ops itnoc_dev_pm_ops = {
- SET_RUNTIME_PM_OPS(itnoc_runtime_suspend, itnoc_runtime_resume, NULL)
+static const struct dev_pm_ops tnoc_dev_pm_ops = {
+ SET_RUNTIME_PM_OPS(tnoc_runtime_suspend, tnoc_runtime_resume, NULL)
};
-static const struct of_device_id itnoc_of_match[] = {
+static const struct of_device_id tnoc_of_match[] = {
{ .compatible = "qcom,coresight-itnoc" },
+ { .compatible = "qcom,coresight-tnoc" },
{}
};
-MODULE_DEVICE_TABLE(of, itnoc_of_match);
+MODULE_DEVICE_TABLE(of, tnoc_of_match);
-static struct platform_driver itnoc_driver = {
- .probe = itnoc_probe,
- .remove = itnoc_remove,
+static struct platform_driver tnoc_platform_driver = {
+ .probe = tnoc_platform_probe,
+ .remove = tnoc_platform_remove,
.driver = {
- .name = "coresight-itnoc",
- .of_match_table = itnoc_of_match,
+ .name = "coresight-tnoc",
+ .of_match_table = tnoc_of_match,
.suppress_bind_attrs = true,
- .pm = &itnoc_dev_pm_ops,
+ .pm = &tnoc_dev_pm_ops,
},
};
static int __init tnoc_init(void)
{
- return coresight_init_driver("tnoc", &trace_noc_driver, &itnoc_driver);
+ return coresight_init_driver("tnoc", &trace_noc_driver, &tnoc_platform_driver);
}
static void __exit tnoc_exit(void)
{
- coresight_remove_driver(&trace_noc_driver, &itnoc_driver);
+ coresight_remove_driver(&trace_noc_driver, &tnoc_platform_driver);
}
module_init(tnoc_init);
module_exit(tnoc_exit);
--
2.34.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v6 2/5] coresight: tnoc: Bind Aggregator TNOC on the platform bus
2026-07-10 2:39 ` [PATCH v6 2/5] coresight: tnoc: Bind Aggregator TNOC on the platform bus Jie Gan
@ 2026-07-10 2:50 ` sashiko-bot
2026-07-10 8:40 ` Leo Yan
1 sibling, 0 replies; 14+ messages in thread
From: sashiko-bot @ 2026-07-10 2:50 UTC (permalink / raw)
To: Jie Gan; +Cc: conor+dt, robh, devicetree
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
New issues:
- [Medium] Missing check for a valid trace ID before freeing it in the AMBA removal path, triggering a kernel WARNING.
Pre-existing issues:
- [High] `trace_noc_id()` returns a negative error instead of `0` when an ATID is unsupported, silently breaking trace path activation.
--
--- Patch [2]: [PATCH v6 2/5] coresight: tnoc: Bind Aggregator TNOC on the platform bus ---
commit 969e610c6fc6cafd77fce4593f5182410a622645
Author: Jie Gan <jie.gan@oss.qualcomm.com>
coresight: tnoc: Bind Aggregator TNOC on the platform bus
This commit moves the Aggregator TNOC to the platform bus since its AMBA
Component ID reads as 0x00000000, preventing normal AMBA matching. It also
renames the driver and callbacks to generic names and updates the ATID
allocation check to match the qcom,coresight-itnoc compatible string
instead of checking if the device is on the AMBA bus.
> diff --git a/drivers/hwtracing/coresight/coresight-tnoc.c b/drivers/hwtracing/coresight/coresight-tnoc.c
> index 9e8de4323d285..737cc802aefe6 100644
> --- a/drivers/hwtracing/coresight/coresight-tnoc.c
> +++ b/drivers/hwtracing/coresight/coresight-tnoc.c
> @@ -130,7 +130,7 @@ static int trace_noc_init_default_data(struct trace_noc_drvdata *drvdata)
> {
> int atid;
>
> - if (!dev_is_amba(drvdata->dev)) {
> + if (of_device_is_compatible(drvdata->dev->of_node, "qcom,coresight-itnoc")) {
> drvdata->atid = -EOPNOTSUPP;
[Severity: High]
This is a pre-existing issue, but does assigning -EOPNOTSUPP here completely
break trace path activation for topologies relying on a downstream Aggregator
TNOC?
When queried, trace_noc_id() returns this negative error code instead of 0.
Because coresight_path_assign_trace_id() treats any non-zero return as an ID,
it evaluates IS_VALID_CS_TRACE_ID() on this negative value, which fails and
immediately aborts path initialization with -EINVAL.
Should this driver store and return 0 instead when an ATID is unsupported,
so that path iteration can successfully continue downstream?
> return 0;
> }
[ ... ]
> @@ -295,16 +295,18 @@ static int itnoc_probe(struct platform_device *pdev)
> return ret;
> }
>
> -static void itnoc_remove(struct platform_device *pdev)
> +static void tnoc_platform_remove(struct platform_device *pdev)
> {
> struct trace_noc_drvdata *drvdata = platform_get_drvdata(pdev);
>
> coresight_unregister(drvdata->csdev);
> pm_runtime_disable(&pdev->dev);
> + if (drvdata->atid > 0)
> + coresight_trace_id_put_system_id(drvdata->atid);
[Severity: Medium]
This platform teardown path correctly verifies the trace ID is valid before
freeing it. Does the AMBA teardown path in trace_noc_remove() need the same
check added?
Because the ATID assignment condition was changed to rely on device tree
compatibles rather than bus types, a malformed device tree could bind an AMBA
device using the qcom,coresight-itnoc compatible string. This would result in
the ATID being set to -EOPNOTSUPP.
During driver unbind, trace_noc_remove() would then pass this negative ID
directly into coresight_trace_id_put_system_id(), which would trigger a kernel
WARNING.
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260710-fix-tracenoc-probe-issue-v6-0-41eb36fef8d9@oss.qualcomm.com?part=2
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v6 2/5] coresight: tnoc: Bind Aggregator TNOC on the platform bus
2026-07-10 2:39 ` [PATCH v6 2/5] coresight: tnoc: Bind Aggregator TNOC on the platform bus Jie Gan
2026-07-10 2:50 ` sashiko-bot
@ 2026-07-10 8:40 ` Leo Yan
1 sibling, 0 replies; 14+ messages in thread
From: Leo Yan @ 2026-07-10 8:40 UTC (permalink / raw)
To: Jie Gan
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Tingwei Zhang, Jingyi Wang, Abel Vesa,
Suzuki K Poulose, Mike Leach, James Clark, Yuanfang Zhang,
Abel Vesa, Alexander Shishkin, Konrad Dybcio, linux-arm-msm,
devicetree, linux-kernel, coresight, linux-arm-kernel
On Fri, Jul 10, 2026 at 10:39:01AM +0800, Jie Gan wrote:
[...]
> The ATID-unsupported handling keyed off dev_is_amba(), which disabled ATID
> allocation for every platform-bus device. With the Aggregator TNOC now on
> the platform bus, that check would wrongly disable its ATID, even though
> the Aggregator TNOC owns the ATID that tags the whole aggregation path.
> The Interconnect TNOC aggregates trace within its subsystem but carries no
> ATID of its own, because the downstream Aggregator TNOC already owns the
> ATID for the path. So base the check on the "qcom,coresight-itnoc"
> compatible and let every other form allocate a trace ID.
>
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
Reviewed-by: Leo Yan <leo.yan@arm.com>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v6 3/5] arm64: dts: qcom: kaanapali: bind traceNoC on the platform bus
2026-07-10 2:38 [PATCH v6 0/5] Fix traceNoC probe issue on multiple QCOM platforms Jie Gan
2026-07-10 2:39 ` [PATCH v6 1/5] dt-bindings: arm: coresight-tnoc: Bind on platform bus instead of AMBA Jie Gan
2026-07-10 2:39 ` [PATCH v6 2/5] coresight: tnoc: Bind Aggregator TNOC on the platform bus Jie Gan
@ 2026-07-10 2:39 ` Jie Gan
2026-07-10 2:54 ` sashiko-bot
2026-07-10 9:49 ` Konrad Dybcio
2026-07-10 2:39 ` [PATCH v6 4/5] arm64: dts: qcom: sm8750: " Jie Gan
2026-07-10 2:39 ` [PATCH v6 5/5] arm64: dts: qcom: glymur: use Aggregator TNOC compatible Jie Gan
4 siblings, 2 replies; 14+ messages in thread
From: Jie Gan @ 2026-07-10 2:39 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Tingwei Zhang, Jingyi Wang, Jie Gan, Abel Vesa,
Suzuki K Poulose, Mike Leach, James Clark, Leo Yan,
Yuanfang Zhang, Abel Vesa, Alexander Shishkin
Cc: Konrad Dybcio, linux-arm-msm, devicetree, linux-kernel, coresight,
linux-arm-kernel
The traceNoC node used the "qcom,coresight-tnoc", "arm,primecell"
compatible, which places the device on the AMBA bus. To bind an AMBA
device, the bus reads the peripheral and component ID registers (PID/CID)
at the top of the device's register block and matches them against the
primecell ID. The traceNoC exposes the CID registers, but the Component ID
value returned by the hardware is 0x00000000 instead of a valid AMBA
Component ID, so the match never succeeds, the AMBA probe fails, and the
device is left stuck in deferred probe indefinitely.
Drop the "arm,primecell" entry and use the standalone "qcom,coresight-tnoc"
compatible, which binds via the platform driver by compatible string and
does not rely on the component ID register at all. This lets the device
probe on hardware that does not return a valid CID, while remaining an
Aggregator TNOC that retains ATID functionality.
Fixes: f73959d86c15 ("arm64: dts: qcom: kaanapali: add coresight nodes")
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/kaanapali.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
index 7aa9653bd456..5d0e7e8c2e58 100644
--- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi
+++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
@@ -5004,7 +5004,7 @@ tpdm_pcie_rscc_out: endpoint {
};
tn@111b8000 {
- compatible = "qcom,coresight-tnoc", "arm,primecell";
+ compatible = "qcom,coresight-tnoc";
reg = <0x0 0x111b8000 0x0 0x4200>;
clocks = <&aoss_qmp>;
--
2.34.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v6 3/5] arm64: dts: qcom: kaanapali: bind traceNoC on the platform bus
2026-07-10 2:39 ` [PATCH v6 3/5] arm64: dts: qcom: kaanapali: bind traceNoC " Jie Gan
@ 2026-07-10 2:54 ` sashiko-bot
2026-07-10 9:49 ` Konrad Dybcio
1 sibling, 0 replies; 14+ messages in thread
From: sashiko-bot @ 2026-07-10 2:54 UTC (permalink / raw)
To: Jie Gan; +Cc: conor+dt, devicetree, robh
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Transitioning this device to the platform bus exposes an unbalanced clock disable (double disable) during device unbind or module removal due to missing PM runtime synchronization in the platform driver's remove path.
--
--- Patch [3]: [PATCH v6 3/5] arm64: dts: qcom: kaanapali: bind traceNoC on the platform bus ---
commit c36a0dfa1784492dc5cc63336f15362356597417
Author: Jie Gan <jie.gan@oss.qualcomm.com>
arm64: dts: qcom: kaanapali: bind traceNoC on the platform bus
This patch removes the arm,primecell compatible string from the traceNoC
node in the kaanapali device tree. This forces the device to bind via the
platform bus rather than the AMBA bus to avoid deferred probes caused by
invalid component IDs.
> diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
> index 7aa9653bd456e..5d0e7e8c2e58c 100644
> --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi
> +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
> @@ -5004,7 +5004,7 @@ tpdm_pcie_rscc_out: endpoint {
> };
>
> tn@111b8000 {
> - compatible = "qcom,coresight-tnoc", "arm,primecell";
> + compatible = "qcom,coresight-tnoc";
[Severity: High]
Will transitioning this device to the platform bus expose an unbalanced
clock disable during device unbind or module removal?
The platform driver's probe fetches and enables the clock using
devm_clk_get_optional_enabled(), which registers a devres action to disable
the clock on cleanup:
drivers/hwtracing/coresight/coresight-core.c:coresight_get_enable_clocks()
*pclk = devm_clk_get_optional_enabled(dev, "apb_pclk");
When the device suspends, tnoc_runtime_suspend() disables the clock:
drivers/hwtracing/coresight/coresight-tnoc.c:tnoc_runtime_suspend()
clk_disable_unprepare(drvdata->pclk);
During unbind, tnoc_platform_remove() fails to call pm_runtime_get_sync()
to resume the device before disabling runtime PM:
drivers/hwtracing/coresight/coresight-tnoc.c:tnoc_platform_remove()
coresight_unregister(drvdata->csdev);
pm_runtime_disable(&pdev->dev);
if (drvdata->atid > 0)
coresight_trace_id_put_system_id(drvdata->atid);
Because the device remains suspended, its clock is already disabled. When
devres subsequently cleans up and executes the clk_disable_unprepare()
action, it could result in a double-disable of the clock. The AMBA bus
handles PM runtime synchronization automatically during remove, but the
platform bus does not.
Could this trigger a kernel warning and corrupt the clock enable count?
> reg = <0x0 0x111b8000 0x0 0x4200>;
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260710-fix-tracenoc-probe-issue-v6-0-41eb36fef8d9@oss.qualcomm.com?part=3
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v6 3/5] arm64: dts: qcom: kaanapali: bind traceNoC on the platform bus
2026-07-10 2:39 ` [PATCH v6 3/5] arm64: dts: qcom: kaanapali: bind traceNoC " Jie Gan
2026-07-10 2:54 ` sashiko-bot
@ 2026-07-10 9:49 ` Konrad Dybcio
1 sibling, 0 replies; 14+ messages in thread
From: Konrad Dybcio @ 2026-07-10 9:49 UTC (permalink / raw)
To: Jie Gan, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Tingwei Zhang, Jingyi Wang,
Abel Vesa, Suzuki K Poulose, Mike Leach, James Clark, Leo Yan,
Yuanfang Zhang, Abel Vesa, Alexander Shishkin
Cc: linux-arm-msm, devicetree, linux-kernel, coresight,
linux-arm-kernel
On 7/10/26 4:39 AM, Jie Gan wrote:
> The traceNoC node used the "qcom,coresight-tnoc", "arm,primecell"
> compatible, which places the device on the AMBA bus. To bind an AMBA
> device, the bus reads the peripheral and component ID registers (PID/CID)
> at the top of the device's register block and matches them against the
> primecell ID. The traceNoC exposes the CID registers, but the Component ID
> value returned by the hardware is 0x00000000 instead of a valid AMBA
> Component ID, so the match never succeeds, the AMBA probe fails, and the
> device is left stuck in deferred probe indefinitely.
>
> Drop the "arm,primecell" entry and use the standalone "qcom,coresight-tnoc"
> compatible, which binds via the platform driver by compatible string and
> does not rely on the component ID register at all. This lets the device
> probe on hardware that does not return a valid CID, while remaining an
> Aggregator TNOC that retains ATID functionality.
>
> Fixes: f73959d86c15 ("arm64: dts: qcom: kaanapali: add coresight nodes")
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v6 4/5] arm64: dts: qcom: sm8750: bind traceNoC on the platform bus
2026-07-10 2:38 [PATCH v6 0/5] Fix traceNoC probe issue on multiple QCOM platforms Jie Gan
` (2 preceding siblings ...)
2026-07-10 2:39 ` [PATCH v6 3/5] arm64: dts: qcom: kaanapali: bind traceNoC " Jie Gan
@ 2026-07-10 2:39 ` Jie Gan
2026-07-10 9:49 ` Konrad Dybcio
2026-07-10 2:39 ` [PATCH v6 5/5] arm64: dts: qcom: glymur: use Aggregator TNOC compatible Jie Gan
4 siblings, 1 reply; 14+ messages in thread
From: Jie Gan @ 2026-07-10 2:39 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Tingwei Zhang, Jingyi Wang, Jie Gan, Abel Vesa,
Suzuki K Poulose, Mike Leach, James Clark, Leo Yan,
Yuanfang Zhang, Abel Vesa, Alexander Shishkin
Cc: Konrad Dybcio, linux-arm-msm, devicetree, linux-kernel, coresight,
linux-arm-kernel
The traceNoC node used the "qcom,coresight-tnoc", "arm,primecell"
compatible, which places the device on the AMBA bus. To bind an AMBA
device, the bus reads the peripheral and component ID registers (PID/CID)
at the top of the device's register block and matches them against the
primecell ID. The traceNoC exposes the CID registers, but the Component ID
value returned by the hardware is 0x00000000 instead of a valid AMBA
Component ID, so the match never succeeds, the AMBA probe fails, and the
device is left stuck in deferred probe indefinitely.
Drop the "arm,primecell" entry and use the standalone "qcom,coresight-tnoc"
compatible, which binds via the platform driver by compatible string and
does not rely on the component ID register at all. This lets the device
probe on hardware that does not return a valid CID, while remaining an
Aggregator TNOC that retains ATID functionality.
Fixes: ebd1eb365cae ("arm64: qcom: dts: sm8750: add coresight nodes")
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm8750.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
index fafed417c66f..1e25be41aef5 100644
--- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
@@ -4687,7 +4687,7 @@ tpdm_rdpm_cmb2_out: endpoint {
};
tn@109ab000 {
- compatible = "qcom,coresight-tnoc", "arm,primecell";
+ compatible = "qcom,coresight-tnoc";
reg = <0x0 0x109ab000 0x0 0x4200>;
clocks = <&aoss_qmp>;
--
2.34.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v6 4/5] arm64: dts: qcom: sm8750: bind traceNoC on the platform bus
2026-07-10 2:39 ` [PATCH v6 4/5] arm64: dts: qcom: sm8750: " Jie Gan
@ 2026-07-10 9:49 ` Konrad Dybcio
0 siblings, 0 replies; 14+ messages in thread
From: Konrad Dybcio @ 2026-07-10 9:49 UTC (permalink / raw)
To: Jie Gan, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Tingwei Zhang, Jingyi Wang,
Abel Vesa, Suzuki K Poulose, Mike Leach, James Clark, Leo Yan,
Yuanfang Zhang, Abel Vesa, Alexander Shishkin
Cc: linux-arm-msm, devicetree, linux-kernel, coresight,
linux-arm-kernel
On 7/10/26 4:39 AM, Jie Gan wrote:
> The traceNoC node used the "qcom,coresight-tnoc", "arm,primecell"
> compatible, which places the device on the AMBA bus. To bind an AMBA
> device, the bus reads the peripheral and component ID registers (PID/CID)
> at the top of the device's register block and matches them against the
> primecell ID. The traceNoC exposes the CID registers, but the Component ID
> value returned by the hardware is 0x00000000 instead of a valid AMBA
> Component ID, so the match never succeeds, the AMBA probe fails, and the
> device is left stuck in deferred probe indefinitely.
>
> Drop the "arm,primecell" entry and use the standalone "qcom,coresight-tnoc"
> compatible, which binds via the platform driver by compatible string and
> does not rely on the component ID register at all. This lets the device
> probe on hardware that does not return a valid CID, while remaining an
> Aggregator TNOC that retains ATID functionality.
>
> Fixes: ebd1eb365cae ("arm64: qcom: dts: sm8750: add coresight nodes")
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v6 5/5] arm64: dts: qcom: glymur: use Aggregator TNOC compatible
2026-07-10 2:38 [PATCH v6 0/5] Fix traceNoC probe issue on multiple QCOM platforms Jie Gan
` (3 preceding siblings ...)
2026-07-10 2:39 ` [PATCH v6 4/5] arm64: dts: qcom: sm8750: " Jie Gan
@ 2026-07-10 2:39 ` Jie Gan
2026-07-10 9:50 ` Konrad Dybcio
4 siblings, 1 reply; 14+ messages in thread
From: Jie Gan @ 2026-07-10 2:39 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Tingwei Zhang, Jingyi Wang, Jie Gan, Abel Vesa,
Suzuki K Poulose, Mike Leach, James Clark, Leo Yan,
Yuanfang Zhang, Abel Vesa, Alexander Shishkin
Cc: Konrad Dybcio, linux-arm-msm, devicetree, linux-kernel, coresight,
linux-arm-kernel
The traceNoC node is the system-level Aggregator TNOC, so it must own a
valid ATID that tags the whole aggregation path. It was marked compatible
with "qcom,coresight-itnoc", an Interconnect TNOC, which is never assigned
an ATID. As a result the aggregator had no trace ID and could not tag the
merged trace.
An Interconnect TNOC is a subsystem-level aggregator: it merges trace from
the ATB sources within its subsystem (TPDMs and other ATB masters) and
forwards the combined stream to the system-level Aggregator TNOC. It
carries no ATID of its own, because the Aggregator TNOC downstream in the
path already owns the ATID.
Switch the node to "qcom,coresight-tnoc" so it is described as the
Aggregator TNOC it is and is assigned a system trace ID. Rename the node
to "tn" and use the "apb_pclk" clock name as required by the Aggregator
TNOC binding.
Fixes: 1f7d0c42a08d ("arm64: dts: qcom: glymur: add coresight nodes")
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/glymur.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
index 20b49af7298e..0c04dca5e557 100644
--- a/arch/arm64/boot/dts/qcom/glymur.dtsi
+++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
@@ -6038,12 +6038,12 @@ qm_tpdm_out: endpoint {
};
};
- itnoc@11200000 {
- compatible = "qcom,coresight-itnoc";
+ tn@11200000 {
+ compatible = "qcom,coresight-tnoc";
reg = <0x0 0x11200000 0x0 0x3c00>;
clocks = <&aoss_qmp>;
- clock-names = "apb";
+ clock-names = "apb_pclk";
in-ports {
#address-cells = <1>;
--
2.34.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v6 5/5] arm64: dts: qcom: glymur: use Aggregator TNOC compatible
2026-07-10 2:39 ` [PATCH v6 5/5] arm64: dts: qcom: glymur: use Aggregator TNOC compatible Jie Gan
@ 2026-07-10 9:50 ` Konrad Dybcio
0 siblings, 0 replies; 14+ messages in thread
From: Konrad Dybcio @ 2026-07-10 9:50 UTC (permalink / raw)
To: Jie Gan, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Tingwei Zhang, Jingyi Wang,
Abel Vesa, Suzuki K Poulose, Mike Leach, James Clark, Leo Yan,
Yuanfang Zhang, Abel Vesa, Alexander Shishkin
Cc: linux-arm-msm, devicetree, linux-kernel, coresight,
linux-arm-kernel
On 7/10/26 4:39 AM, Jie Gan wrote:
> The traceNoC node is the system-level Aggregator TNOC, so it must own a
> valid ATID that tags the whole aggregation path. It was marked compatible
> with "qcom,coresight-itnoc", an Interconnect TNOC, which is never assigned
> an ATID. As a result the aggregator had no trace ID and could not tag the
> merged trace.
>
> An Interconnect TNOC is a subsystem-level aggregator: it merges trace from
> the ATB sources within its subsystem (TPDMs and other ATB masters) and
> forwards the combined stream to the system-level Aggregator TNOC. It
> carries no ATID of its own, because the Aggregator TNOC downstream in the
> path already owns the ATID.
>
> Switch the node to "qcom,coresight-tnoc" so it is described as the
> Aggregator TNOC it is and is assigned a system trace ID. Rename the node
> to "tn" and use the "apb_pclk" clock name as required by the Aggregator
> TNOC binding.
>
> Fixes: 1f7d0c42a08d ("arm64: dts: qcom: glymur: add coresight nodes")
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
^ permalink raw reply [flat|nested] 14+ messages in thread