* [PATCH 2/4] dt-bindings: vendor-prefixes: Add techvision
2026-07-11 19:28 [PATCH 0/4] Add devicetree for LincPlus LincStation E1 Samuel Holland
2026-07-11 19:28 ` [PATCH 1/4] dt-bindings: leds: Document "gpio" trigger Samuel Holland
@ 2026-07-11 19:28 ` Samuel Holland
2026-07-11 19:29 ` sashiko-bot
2026-07-11 19:28 ` [PATCH 3/4] dt-bindings: arm: rockchip: Add LincStation E1 Samuel Holland
2026-07-11 19:28 ` [PATCH 4/4] arm64: dts: " Samuel Holland
3 siblings, 1 reply; 9+ messages in thread
From: Samuel Holland @ 2026-07-11 19:28 UTC (permalink / raw)
To: Heiko Stuebner, Conor Dooley, Krzysztof Kozlowski, Rob Herring
Cc: linux-rockchip, devicetree, linux-kernel, linux-leds, Lee Jones,
Pavel Machek, linux-arm-kernel, Samuel Holland
Techvision Intelligent Technology Co., Ltd[1] aka Shenzhen Huiwei
Intelligent Technology Co., Ltd[2] is a manufacturer of single-board
computers.
Link: https://cn.techvision.com.cn/ [1]
Link: https://www.techvision.com.cn/ [2]
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 396044f368e7..2355505013a0 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1662,6 +1662,8 @@ patternProperties:
description: Technologic Systems
"^techstar,.*":
description: Shenzhen Techstar Electronics Co., Ltd.
+ "^techvision,.*":
+ description: Techvision Intelligent Technology Co., Ltd
"^techwell,.*":
description: Techwell, Inc.
"^teejet,.*":
--
2.54.0
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 3/4] dt-bindings: arm: rockchip: Add LincStation E1
2026-07-11 19:28 [PATCH 0/4] Add devicetree for LincPlus LincStation E1 Samuel Holland
2026-07-11 19:28 ` [PATCH 1/4] dt-bindings: leds: Document "gpio" trigger Samuel Holland
2026-07-11 19:28 ` [PATCH 2/4] dt-bindings: vendor-prefixes: Add techvision Samuel Holland
@ 2026-07-11 19:28 ` Samuel Holland
2026-07-11 19:30 ` sashiko-bot
2026-07-11 19:28 ` [PATCH 4/4] arm64: dts: " Samuel Holland
3 siblings, 1 reply; 9+ messages in thread
From: Samuel Holland @ 2026-07-11 19:28 UTC (permalink / raw)
To: Heiko Stuebner, Conor Dooley, Krzysztof Kozlowski, Rob Herring
Cc: linux-rockchip, devicetree, linux-kernel, linux-leds, Lee Jones,
Pavel Machek, linux-arm-kernel, Samuel Holland
LincStation E1 is an entry-level NAS device powered by the RK3568B2 SoC
with two 3.5" HDD slots and two m.2 2280 slots for SSDs. It is marketed
under the LincPlus[1] brand, but the OEM appears to be Techvision
Intelligent Technology Co., Ltd[2]. The OEM model number is TVD8322R,
which is referenced by the vendor devicetree, a sticker on the board,
and a design patent (CN309443154S) matching the system chassis.
Link: https://www.lincplustech.com/products/lincstation-e1-network-attached-storage.html [1]
Link: https://cn.techvision.com.cn [2]
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 1a9dde18626d..ca2e4327ac3f 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -779,6 +779,11 @@ properties:
- const: lckfb,tspi-rk3566
- const: rockchip,rk3566
+ - description: LincPlus LincStation E1
+ items:
+ - const: techvision,tvd8322r
+ - const: rockchip,rk3568
+
- description: LinkEase EasePi R1
items:
- const: linkease,easepi-r1
--
2.54.0
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 4/4] arm64: dts: rockchip: Add LincStation E1
2026-07-11 19:28 [PATCH 0/4] Add devicetree for LincPlus LincStation E1 Samuel Holland
` (2 preceding siblings ...)
2026-07-11 19:28 ` [PATCH 3/4] dt-bindings: arm: rockchip: Add LincStation E1 Samuel Holland
@ 2026-07-11 19:28 ` Samuel Holland
2026-07-11 19:35 ` sashiko-bot
3 siblings, 1 reply; 9+ messages in thread
From: Samuel Holland @ 2026-07-11 19:28 UTC (permalink / raw)
To: Heiko Stuebner, Conor Dooley, Krzysztof Kozlowski, Rob Herring
Cc: linux-rockchip, devicetree, linux-kernel, linux-leds, Lee Jones,
Pavel Machek, linux-arm-kernel, Samuel Holland
LincStation E1 is an entry-level NAS device powered by the RK3568B2 SoC
with two 3.5" HDD slots (behind a SATA port multiplier) and two m.2 2280
slots for SSDs (each PCIe 3.0 x1). Other major features include:
- 4 GiB DRAM / 64 GB eMMC
- RTL8125 2.5 Gb Ethernet
- Fn-Link 6222B-SRC Wi-Fi 5 / Bluetooth module
- 1 USB 5 Gbps + 2 USB high speed ports
- HDMI output
Each HDD slot provides a GPIO input for disk presence detection and an
output for power control. Since the disks are behind a port multiplier,
there is no way to describe them in the devicetree, so the disk power
is enabled at all times by GPIO hogs, and the detection inputs are used
only as LED triggers.
The board contains several pairs of amber/white LEDs for power, disk,
m.2 slot, and network status. These are configured to use triggers when
possible. The PWM fan uses a relatively aggressive fan curve to keep
the hard disks within a safe temperature range. It may benefit from
further tuning.
The pinhole reset button is multiplexed between the SoC reset pin and
an ADC input. The mux is configured here to drive the SoC reset pin, as
this works reliably without polling by software. The adc-keys
description is included for use by a devicetree overlay if desired.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../dts/rockchip/rk3568-lincstation-e1.dts | 1004 +++++++++++++++++
2 files changed, 1005 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-lincstation-e1.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 761d82b4f4f2..d0d675892196 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -146,6 +146,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r68s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-hinlink-h66k.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-hinlink-h68k.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-lincstation-e1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-lubancat-2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mecsbc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-lincstation-e1.dts b/arch/arm64/boot/dts/rockchip/rk3568-lincstation-e1.dts
new file mode 100644
index 000000000000..ad81b892b00c
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3568-lincstation-e1.dts
@@ -0,0 +1,1004 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+
+#include "rk3568.dtsi"
+
+/ {
+ model = "LincPlus LincStation E1";
+ compatible = "techvision,tvd8322r", "rockchip,rk3568";
+
+ aliases {
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc1;
+ rtc0 = &hym8563;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ /* This device is only available when reset-button-mux is driven high */
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 5>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+ status = "disabled";
+
+ button-reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ press-threshold-microvolt = <0>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio_leds &sata1_detect &sata2_detect>;
+
+ led-2 {
+ color = <LED_COLOR_ID_WHITE>;
+ function = LED_FUNCTION_LAN;
+ gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "netdev";
+ };
+
+ led-3 {
+ color = <LED_COLOR_ID_AMBER>;
+ function = LED_FUNCTION_LAN;
+ gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "netdev";
+ };
+
+ led-4 {
+ color = <LED_COLOR_ID_WHITE>;
+ function = "m1";
+ gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-5 {
+ color = <LED_COLOR_ID_AMBER>;
+ function = "m1";
+ gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-6 {
+ color = <LED_COLOR_ID_WHITE>;
+ function = "m2";
+ gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-7 {
+ color = <LED_COLOR_ID_AMBER>;
+ function = "m2";
+ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-8 {
+ color = <LED_COLOR_ID_WHITE>;
+ function = "s1";
+ gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "disk-activity";
+ };
+
+ led-9 {
+ color = <LED_COLOR_ID_AMBER>;
+ function = "s1";
+ gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "gpio";
+ trigger-sources = <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>;
+ };
+
+ led-a {
+ color = <LED_COLOR_ID_WHITE>;
+ function = "s2";
+ gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "disk-activity";
+ };
+
+ led-b {
+ color = <LED_COLOR_ID_AMBER>;
+ function = "s2";
+ gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "gpio";
+ trigger-sources = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ hdmi-con {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ fan: pwm-fan {
+ compatible = "pwm-fan";
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
+ #cooling-cells = <2>;
+ cooling-levels = <0 20 50 90 130 170 210 225 240 255>;
+ fan-supply = <&vcc12v0_sys>;
+ fan-stop-to-start-percent = <8>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&fan_tach>;
+ pulses-per-revolution = <2>;
+ pwms = <&pwm0 0 50000 0>;
+ };
+
+ pwm-leds {
+ compatible = "pwm-leds";
+
+ led-0 {
+ color = <LED_COLOR_ID_AMBER>;
+ default-state = "off";
+ function = LED_FUNCTION_STANDBY;
+ max-brightness = <255>;
+ pwms = <&pwm4 0 25000 0>;
+ };
+
+ led-1 {
+ color = <LED_COLOR_ID_WHITE>;
+ default-brightness = <127>;
+ default-state = "on";
+ function = LED_FUNCTION_POWER;
+ max-brightness = <255>;
+ pwms = <&pwm5 0 25000 0>;
+ };
+ };
+
+ dc_12v: regulator-dc-12v {
+ compatible = "regulator-fixed";
+ regulator-name = "dc_12v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ vcc12v0_sys: regulator-vcc12v0-sys {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc12v0_sys_en>;
+ regulator-name = "vcc12v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc3v3_lan: regulator-vcc3v3-lan {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc3v3_lan_en>;
+ regulator-name = "vcc3v3_lan";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc3v3_pcie: regulator-vcc3v3-pcie {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc3v3_pcie_en>;
+ off-on-delay-us = <500000>;
+ regulator-name = "vcc3v3_pcie";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <5000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc3v3_sys: regulator-vcc3v3-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc5v0_sata: regulator-vcc5v0-sata {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_sata_en>;
+ regulator-name = "vcc5v0_sata";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc5v0_sys: regulator-vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc5v0_usb: regulator-vcc5v0-usb {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc5v0_usb_host: regulator-vcc5v0-usb-host {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb_host_en>;
+ regulator-name = "vcc5v0_usb_host";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_usb>;
+ };
+
+ vcc5v0_usb_otg: regulator-vcc5v0-usb-otg {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb_otg_en>;
+ regulator-name = "vcc5v0_usb_otg";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_usb>;
+ };
+
+ vcc_wl: regulator-vcc-wl {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc_wl_en>;
+ regulator-name = "vcc_wl";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vccio_wl: regulator-vccio-wl {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vccio_wl_en>;
+ regulator-name = "vccio_wl";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk809 1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+ post-power-on-delay-ms = <200>;
+ reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&combphy0 {
+ status = "okay";
+};
+
+&combphy1 {
+ status = "okay";
+};
+
+&combphy2 {
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+/*
+ * The fan pulls hot air from the CPU and m.2 slot heat sinks and blows it
+ * across the hard disks. To keep the disks from overheating (below 50 °C),
+ * their ambient air, and thus the CPU heat sink, must be kept quite cool.
+ */
+&cpu_thermal {
+ trips {
+ sys_fan1: sys-fan1 {
+ hysteresis = <2000>;
+ temperature = <25000>;
+ type = "active";
+ };
+
+ sys_fan2: sys-fan2 {
+ hysteresis = <2000>;
+ temperature = <35000>;
+ type = "active";
+ };
+
+ sys_fan3: sys-fan3 {
+ hysteresis = <2000>;
+ temperature = <45000>;
+ type = "active";
+ };
+ };
+
+ cooling-maps {
+ map1 {
+ cooling-device = <&fan 1 3>;
+ trip = <&sys_fan1>;
+ };
+
+ map2 {
+ cooling-device = <&fan 4 5>;
+ trip = <&sys_fan2>;
+ };
+
+ map3 {
+ cooling-device = <&fan 6 THERMAL_NO_LIMIT>;
+ trip = <&sys_fan3>;
+ };
+ };
+};
+
+&gpio1 {
+ /* ata1.01 is the slot labeled HDD2 */
+ sata1-power-control-hog {
+ gpio-hog;
+ gpios = <RK_PD7 GPIO_ACTIVE_LOW>;
+ line-name = "sata1-power-control";
+ output-high;
+ };
+};
+
+&gpio2 {
+ /* ata1.02 is the slot labeled HDD1 */
+ sata2-power-control-hog {
+ gpio-hog;
+ gpios = <RK_PA0 GPIO_ACTIVE_LOW>;
+ line-name = "sata2-power-control";
+ output-high;
+ };
+};
+
+&gpio4 {
+ /* low = SoC reset, high = saradc input */
+ reset-button-mux-hog {
+ gpio-hog;
+ gpios = <RK_PB7 GPIO_ACTIVE_HIGH>;
+ line-name = "reset-button-mux";
+ output-low;
+ };
+
+ sata-pm-reset-hog {
+ gpio-hog;
+ gpios = <RK_PD2 GPIO_ACTIVE_LOW>;
+ line-name = "sata-pm-reset";
+ output-low;
+ };
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
+&hdmi {
+ avdd-0v9-supply = <&vdda0v9_image>;
+ avdd-1v8-supply = <&vcca1v8_image>;
+ status = "okay";
+};
+
+&hdmi_in {
+ hdmi_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi>;
+ };
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&hdmi_sound {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+
+ vdd_cpu: regulator@40 {
+ compatible = "silergy,syr827";
+ reg = <0x40>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ rk809: pmic@20 {
+ compatible = "rockchip,rk809";
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int>;
+ system-power-controller;
+ vcc1-supply = <&vcc3v3_sys>;
+ vcc2-supply = <&vcc3v3_sys>;
+ vcc3-supply = <&vcc3v3_sys>;
+ vcc4-supply = <&vcc3v3_sys>;
+ vcc5-supply = <&vcc3v3_sys>;
+ vcc6-supply = <&vcc5v0_sys>;
+ vcc7-supply = <&vcc3v3_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc3v3_sys>;
+ wakeup-source;
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-name = "vdd_logic";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: DCDC_REG2 {
+ regulator-name = "vdd_gpu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-mode = <0x2>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vdd_npu: DCDC_REG4 {
+ regulator-name = "vdd_npu";
+ regulator-initial-mode = <0x2>;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG5 {
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdda0v9_image: LDO_REG1 {
+ regulator-name = "vdda0v9_image";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v9: LDO_REG2 {
+ regulator-name = "vdda_0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v9_pmu: LDO_REG3 {
+ regulator-name = "vdda0v9_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <900000>;
+ };
+ };
+
+ vccio_acodec: LDO_REG4 {
+ regulator-name = "vccio_acodec";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-name = "vccio_sd";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_pmu: LDO_REG6 {
+ regulator-name = "vcc3v3_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcca_1v8: LDO_REG7 {
+ regulator-name = "vcca_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pmu: LDO_REG8 {
+ regulator-name = "vcca1v8_pmu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcca1v8_image: LDO_REG9 {
+ regulator-name = "vcca1v8_image";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3: SWITCH_REG1 {
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_sd: SWITCH_REG2 {
+ regulator-name = "vcc3v3_sd";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <0>;
+ clock-output-names = "rtcic_32kout";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hym8563_int>;
+ wakeup-source;
+ };
+};
+
+&i2s0_8ch {
+ status = "okay";
+};
+
+&pcie2x1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2x1_rst>;
+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_lan>;
+ status = "okay";
+};
+
+&pcie30phy {
+ data-lanes = <1 2>;
+ status = "okay";
+};
+
+&pcie3x1 {
+ reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie>;
+ status = "okay";
+};
+
+&pcie3x2 {
+ num-lanes = <1>;
+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie>;
+ status = "okay";
+};
+
+&pinctrl {
+ bluetooth {
+ bt_device_wake_h: bt-device-wake-h {
+ rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_enable_h: bt-enable-h {
+ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_host_wake_h: bt-host-wake-h {
+ rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ gpio-leds {
+ gpio_leds: gpio-leds {
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ pcie {
+ pcie2x1_rst: pcie2x1-rst {
+ rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vcc3v3_lan_en: vcc3v3-lan-en {
+ rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vcc3v3_pcie_en: vcc3v3-pcie-en {
+ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int: pmic-int {
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ pwm-fan {
+ fan_tach: fan-tach {
+ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vcc12v0_sys_en: vcc12v0-sys-en {
+ rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sata {
+ sata1_detect: sata1-detect {
+ rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ sata2_detect: sata2-detect {
+ rockchip,pins = <1 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ vcc5v0_sata_en: vcc5v0-sata-en {
+ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ vcc5v0_usb_host_en: vcc5v0-usb-host-en {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vcc5v0_usb_otg_en: vcc5v0-usb-otg-en {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ wlan {
+ vcc_wl_en: vcc-wl-en {
+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vccio_wl_en: vccio-wl-en {
+ rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wifi_host_wake_h: wifi-host-wake-h {
+ rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+};
+
+&pmu_io_domains {
+ pmuio1-supply = <&vcc3v3_pmu>;
+ pmuio2-supply = <&vcc3v3_pmu>;
+ vccio1-supply = <&vccio_acodec>;
+ vccio2-supply = <&vcc_1v8>;
+ vccio3-supply = <&vccio_sd>;
+ vccio4-supply = <&vcc_1v8>;
+ vccio5-supply = <&vcc_3v3>;
+ vccio6-supply = <&vcc_1v8>;
+ vccio7-supply = <&vcc_3v3>;
+ status = "okay";
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&pwm4 {
+ status = "okay";
+};
+
+&pwm5 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcca_1v8>;
+ status = "disabled";
+};
+
+&sata1 {
+ target-supply = <&vcc5v0_sata>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
+ status = "okay";
+};
+
+&sdmmc1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ disable-wp;
+ keep-power-in-suspend;
+ max-frequency = <208000000>;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ no-mmc;
+ no-sd;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_clk &sdmmc1_cmd>;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_wl>;
+ vqmmc-supply = <&vccio_wl>;
+ status = "okay";
+
+ rtl8822cs: wifi@1 {
+ reg = <1>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <RK_PB2 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_host_wake_h>;
+ };
+};
+
+&tsadc {
+ rockchip,hw-tshut-mode = <0>;
+ rockchip,hw-tshut-polarity = <0>;
+ status = "okay";
+};
+
+&uart1 {
+ dma-names = "tx", "rx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ compatible = "realtek,rtl8822cs-bt";
+ device-wake-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
+ enable-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
+ host-wake-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_device_wake_h &bt_enable_h &bt_host_wake_h>;
+ };
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ dr_mode = "host";
+ extcon = <&usb2phy0>;
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usb2phy0 {
+ status = "okay";
+};
+
+&usb2phy0_otg {
+ phy-supply = <&vcc5v0_usb_otg>;
+ status = "okay";
+};
+
+&usb2phy1 {
+ status = "okay";
+};
+
+&usb2phy1_host {
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
+&usb2phy1_otg {
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
+&vop {
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};
--
2.54.0
^ permalink raw reply related [flat|nested] 9+ messages in thread