* [PATCH 0/2] ARM: dts: aspeed: bletchley: Add second source devices @ 2026-07-14 12:08 Cosmo Chou 2026-07-14 12:08 ` [PATCH 1/2] ARM: dts: aspeed: bletchley: Add second source ISL1208 RTC Cosmo Chou 2026-07-14 12:08 ` [PATCH 2/2] ARM: dts: aspeed: bletchley: Add second source PCA9532 LED controllers Cosmo Chou 0 siblings, 2 replies; 5+ messages in thread From: Cosmo Chou @ 2026-07-14 12:08 UTC (permalink / raw) To: robh, krzk+dt, conor+dt, joel, andrew Cc: devicetree, linux-arm-kernel, linux-aspeed, linux-kernel, cosmo.chou, Cosmo Chou Add second source RTC (ISL1208) and LED controllers (PCA9532) for the Bletchley platform. Cosmo Chou (2): ARM: dts: aspeed: bletchley: Add second source ISL1208 RTC ARM: dts: aspeed: bletchley: Add second source PCA9532 LED controllers .../aspeed/aspeed-bmc-facebook-bletchley.dts | 294 ++++++++++++++++++ 1 file changed, 294 insertions(+) -- 2.53.0 ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] ARM: dts: aspeed: bletchley: Add second source ISL1208 RTC 2026-07-14 12:08 [PATCH 0/2] ARM: dts: aspeed: bletchley: Add second source devices Cosmo Chou @ 2026-07-14 12:08 ` Cosmo Chou 2026-07-14 12:18 ` sashiko-bot 2026-07-14 12:08 ` [PATCH 2/2] ARM: dts: aspeed: bletchley: Add second source PCA9532 LED controllers Cosmo Chou 1 sibling, 1 reply; 5+ messages in thread From: Cosmo Chou @ 2026-07-14 12:08 UTC (permalink / raw) To: robh, krzk+dt, conor+dt, joel, andrew Cc: devicetree, linux-arm-kernel, linux-aspeed, linux-kernel, cosmo.chou, Cosmo Chou Add alternative ISL1208 RTC at address 0x6f to support boards populated with the ISL1208 instead of the primary PCF85263 at 0x51. Signed-off-by: Cosmo Chou <chou.cosmo@gmail.com> --- arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts index d1a04b63d..a966be69f 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts @@ -865,6 +865,11 @@ eeprom@56 { reg = <0x56>; }; + rtc@6f { + compatible = "isil,isl1208"; + reg = <0x6f>; + }; + rtc@51 { /* in-chip rtc disabled, use external rtc (battery-backed) */ compatible = "nxp,pcf85263"; -- 2.53.0 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] ARM: dts: aspeed: bletchley: Add second source ISL1208 RTC 2026-07-14 12:08 ` [PATCH 1/2] ARM: dts: aspeed: bletchley: Add second source ISL1208 RTC Cosmo Chou @ 2026-07-14 12:18 ` sashiko-bot 0 siblings, 0 replies; 5+ messages in thread From: sashiko-bot @ 2026-07-14 12:18 UTC (permalink / raw) To: Cosmo Chou; +Cc: robh, conor+dt, devicetree Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Medium] The new `rtc@6f` node is deliberately inserted out of numerical order (before `rtc@51`) to manipulate probe order. This acts as a brittle workaround for a driver bug in `rtc-pcf85363.c` (which unconditionally registers a phantom RTC even when the hardware is absent). -- --- Patch [1]: [PATCH 1/2] ARM: dts: aspeed: bletchley: Add second source ISL1208 RTC --- commit e443fe47105505ac961ac3a866a76ec1173a5817 Author: Cosmo Chou <chou.cosmo@gmail.com> ARM: dts: aspeed: bletchley: Add second source ISL1208 RTC This commit adds an alternative ISL1208 RTC at address 0x6f to support boards populated with it instead of the primary PCF85263 at 0x51. > diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts > index d1a04b63df9e0..a966be69ff27d 100644 > --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts > +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts > @@ -865,6 +865,11 @@ eeprom@56 { > reg = <0x56>; > }; > > + rtc@6f { > + compatible = "isil,isl1208"; > + reg = <0x6f>; > + }; > + > rtc@51 { [Severity: Medium] Are these device tree nodes intentionally placed out of numerical order? Typically, device tree nodes are sorted by their unit address, meaning rtc@51 would normally appear before rtc@6f. If this out-of-order placement is intended to force rtc@6f to probe first as a workaround for a driver issue in rtc-pcf85363.c (which unconditionally registers a phantom RTC even when the hardware is absent), could this create a brittle dependency? If a developer later sorts these nodes by unit address during a routine cleanup, the probe order would change. This could allow the phantom PCF85263 device to probe first and claim /dev/rtc0, which might silently break system timekeeping on ISL1208 boards. > /* in-chip rtc disabled, use external rtc (battery-backed) */ > compatible = "nxp,pcf85263"; -- Sashiko AI review · https://sashiko.dev/#/patchset/20260714120816.1504058-1-chou.cosmo@gmail.com?part=1 ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/2] ARM: dts: aspeed: bletchley: Add second source PCA9532 LED controllers 2026-07-14 12:08 [PATCH 0/2] ARM: dts: aspeed: bletchley: Add second source devices Cosmo Chou 2026-07-14 12:08 ` [PATCH 1/2] ARM: dts: aspeed: bletchley: Add second source ISL1208 RTC Cosmo Chou @ 2026-07-14 12:08 ` Cosmo Chou 2026-07-14 12:28 ` sashiko-bot 1 sibling, 1 reply; 5+ messages in thread From: Cosmo Chou @ 2026-07-14 12:08 UTC (permalink / raw) To: robh, krzk+dt, conor+dt, joel, andrew Cc: devicetree, linux-arm-kernel, linux-aspeed, linux-kernel, cosmo.chou, Cosmo Chou Add alternative PCA9532 LED controllers at address 0x66 to support boards populated with the PCA9532 instead of the primary PCA9552 at 0x67. Signed-off-by: Cosmo Chou <chou.cosmo@gmail.com> --- .../aspeed/aspeed-bmc-facebook-bletchley.dts | 289 ++++++++++++++++++ 1 file changed, 289 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts index a966be69f..86e2b5aec 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts @@ -6,6 +6,7 @@ #include <dt-bindings/gpio/aspeed-gpio.h> #include <dt-bindings/usb/pd.h> #include <dt-bindings/leds/leds-pca955x.h> +#include <dt-bindings/leds/leds-pca9532.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/i2c/i2c.h> @@ -113,6 +114,58 @@ led-7 { }; }; + fan_gpio_leds_alt { + compatible = "gpio-leds"; + led-0 { + label = "fan0_blue"; + retain-state-shutdown; + default-state = "on"; + gpios = <&fan_leds_alt 8 GPIO_ACTIVE_HIGH>; + }; + led-1 { + label = "fan1_blue"; + retain-state-shutdown; + default-state = "on"; + gpios = <&fan_leds_alt 9 GPIO_ACTIVE_HIGH>; + }; + led-2 { + label = "fan2_blue"; + retain-state-shutdown; + default-state = "on"; + gpios = <&fan_leds_alt 10 GPIO_ACTIVE_HIGH>; + }; + led-3 { + label = "fan3_blue"; + retain-state-shutdown; + default-state = "on"; + gpios = <&fan_leds_alt 11 GPIO_ACTIVE_HIGH>; + }; + led-4 { + label = "fan0_amber"; + retain-state-shutdown; + default-state = "off"; + gpios = <&fan_leds_alt 12 GPIO_ACTIVE_HIGH>; + }; + led-5 { + label = "fan1_amber"; + retain-state-shutdown; + default-state = "off"; + gpios = <&fan_leds_alt 13 GPIO_ACTIVE_HIGH>; + }; + led-6 { + label = "fan2_amber"; + retain-state-shutdown; + default-state = "off"; + gpios = <&fan_leds_alt 14 GPIO_ACTIVE_HIGH>; + }; + led-7 { + label = "fan3_amber"; + retain-state-shutdown; + default-state = "off"; + gpios = <&fan_leds_alt 15 GPIO_ACTIVE_HIGH>; + }; + }; + sled1_gpio_leds { compatible = "gpio-leds"; led-0 { @@ -129,6 +182,22 @@ led-1 { }; }; + sled1_gpio_leds_alt { + compatible = "gpio-leds"; + led-0 { + label = "sled1_amber"; + retain-state-shutdown; + default-state = "keep"; + gpios = <&sled1_leds_alt 0 GPIO_ACTIVE_LOW>; + }; + led-1 { + label = "sled1_blue"; + retain-state-shutdown; + default-state = "keep"; + gpios = <&sled1_leds_alt 1 GPIO_ACTIVE_LOW>; + }; + }; + sled2_gpio_leds { compatible = "gpio-leds"; led-0 { @@ -145,6 +214,22 @@ led-1 { }; }; + sled2_gpio_leds_alt { + compatible = "gpio-leds"; + led-0 { + label = "sled2_amber"; + retain-state-shutdown; + default-state = "keep"; + gpios = <&sled2_leds_alt 0 GPIO_ACTIVE_LOW>; + }; + led-1 { + label = "sled2_blue"; + retain-state-shutdown; + default-state = "keep"; + gpios = <&sled2_leds_alt 1 GPIO_ACTIVE_LOW>; + }; + }; + sled3_gpio_leds { compatible = "gpio-leds"; led-0 { @@ -161,6 +246,22 @@ led-1 { }; }; + sled3_gpio_leds_alt { + compatible = "gpio-leds"; + led-0 { + label = "sled3_amber"; + retain-state-shutdown; + default-state = "keep"; + gpios = <&sled3_leds_alt 0 GPIO_ACTIVE_LOW>; + }; + led-1 { + label = "sled3_blue"; + retain-state-shutdown; + default-state = "keep"; + gpios = <&sled3_leds_alt 1 GPIO_ACTIVE_LOW>; + }; + }; + sled4_gpio_leds { compatible = "gpio-leds"; led-0 { @@ -177,6 +278,22 @@ led-1 { }; }; + sled4_gpio_leds_alt { + compatible = "gpio-leds"; + led-0 { + label = "sled4_amber"; + retain-state-shutdown; + default-state = "keep"; + gpios = <&sled4_leds_alt 0 GPIO_ACTIVE_LOW>; + }; + led-1 { + label = "sled4_blue"; + retain-state-shutdown; + default-state = "keep"; + gpios = <&sled4_leds_alt 1 GPIO_ACTIVE_LOW>; + }; + }; + sled5_gpio_leds { compatible = "gpio-leds"; led-0 { @@ -193,6 +310,22 @@ led-1 { }; }; + sled5_gpio_leds_alt { + compatible = "gpio-leds"; + led-0 { + label = "sled5_amber"; + retain-state-shutdown; + default-state = "keep"; + gpios = <&sled5_leds_alt 0 GPIO_ACTIVE_LOW>; + }; + led-1 { + label = "sled5_blue"; + retain-state-shutdown; + default-state = "keep"; + gpios = <&sled5_leds_alt 1 GPIO_ACTIVE_LOW>; + }; + }; + sled6_gpio_leds { compatible = "gpio-leds"; led-0 { @@ -209,6 +342,22 @@ led-1 { }; }; + sled6_gpio_leds_alt { + compatible = "gpio-leds"; + led-0 { + label = "sled6_amber"; + retain-state-shutdown; + default-state = "keep"; + gpios = <&sled6_leds_alt 0 GPIO_ACTIVE_LOW>; + }; + led-1 { + label = "sled6_blue"; + retain-state-shutdown; + default-state = "keep"; + gpios = <&sled6_leds_alt 1 GPIO_ACTIVE_LOW>; + }; + }; + gpio-keys { compatible = "gpio-keys"; @@ -401,6 +550,24 @@ sled1_leds: pca9552@67 { "","","",""; }; + sled1_leds_alt: pca9532@66 { + compatible = "nxp,pca9532"; + reg = <0x66>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "led-sled1-amber","led-sled1-blue","SLED1_RST_IOEXP","SLED1_MD_REF_PWM", + "","","","", + "","","","", + "","","",""; + + led-0 { type = <PCA9532_TYPE_GPIO>; }; + led-1 { type = <PCA9532_TYPE_GPIO>; }; + led-2 { type = <PCA9532_TYPE_GPIO>; }; + led-3 { type = <PCA9532_TYPE_GPIO>; }; + }; + sled1_fusb302: typec-portc@22 { compatible = "fcs,fusb302"; reg = <0x22>; @@ -487,6 +654,24 @@ sled2_leds: pca9552@67 { "","","",""; }; + sled2_leds_alt: pca9532@66 { + compatible = "nxp,pca9532"; + reg = <0x66>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "led-sled2-amber","led-sled2-blue","SLED2_RST_IOEXP","SLED2_MD_REF_PWM", + "","","","", + "","","","", + "","","",""; + + led-0 { type = <PCA9532_TYPE_GPIO>; }; + led-1 { type = <PCA9532_TYPE_GPIO>; }; + led-2 { type = <PCA9532_TYPE_GPIO>; }; + led-3 { type = <PCA9532_TYPE_GPIO>; }; + }; + sled2_fusb302: typec-portc@22 { compatible = "fcs,fusb302"; reg = <0x22>; @@ -573,6 +758,24 @@ sled3_leds: pca9552@67 { "","","",""; }; + sled3_leds_alt: pca9532@66 { + compatible = "nxp,pca9532"; + reg = <0x66>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "led-sled3-amber","led-sled3-blue","SLED3_RST_IOEXP","SLED3_MD_REF_PWM", + "","","","", + "","","","", + "","","",""; + + led-0 { type = <PCA9532_TYPE_GPIO>; }; + led-1 { type = <PCA9532_TYPE_GPIO>; }; + led-2 { type = <PCA9532_TYPE_GPIO>; }; + led-3 { type = <PCA9532_TYPE_GPIO>; }; + }; + sled3_fusb302: typec-portc@22 { compatible = "fcs,fusb302"; reg = <0x22>; @@ -659,6 +862,24 @@ sled4_leds: pca9552@67 { "","","",""; }; + sled4_leds_alt: pca9532@66 { + compatible = "nxp,pca9532"; + reg = <0x66>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "led-sled4-amber","led-sled4-blue","SLED4_RST_IOEXP","SLED4_MD_REF_PWM", + "","","","", + "","","","", + "","","",""; + + led-0 { type = <PCA9532_TYPE_GPIO>; }; + led-1 { type = <PCA9532_TYPE_GPIO>; }; + led-2 { type = <PCA9532_TYPE_GPIO>; }; + led-3 { type = <PCA9532_TYPE_GPIO>; }; + }; + sled4_fusb302: typec-portc@22 { compatible = "fcs,fusb302"; reg = <0x22>; @@ -745,6 +966,24 @@ sled5_leds: pca9552@67 { "","","",""; }; + sled5_leds_alt: pca9532@66 { + compatible = "nxp,pca9532"; + reg = <0x66>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "led-sled5-amber","led-sled5-blue","SLED5_RST_IOEXP","SLED5_MD_REF_PWM", + "","","","", + "","","","", + "","","",""; + + led-0 { type = <PCA9532_TYPE_GPIO>; }; + led-1 { type = <PCA9532_TYPE_GPIO>; }; + led-2 { type = <PCA9532_TYPE_GPIO>; }; + led-3 { type = <PCA9532_TYPE_GPIO>; }; + }; + sled5_fusb302: typec-portc@22 { compatible = "fcs,fusb302"; reg = <0x22>; @@ -831,6 +1070,24 @@ sled6_leds: pca9552@67 { "","","",""; }; + sled6_leds_alt: pca9532@66 { + compatible = "nxp,pca9532"; + reg = <0x66>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "led-sled6-amber","led-sled6-blue","SLED6_RST_IOEXP","SLED6_MD_REF_PWM", + "","","","", + "","","","", + "","","",""; + + led-0 { type = <PCA9532_TYPE_GPIO>; }; + led-1 { type = <PCA9532_TYPE_GPIO>; }; + led-2 { type = <PCA9532_TYPE_GPIO>; }; + led-3 { type = <PCA9532_TYPE_GPIO>; }; + }; + sled6_fusb302: typec-portc@22 { compatible = "fcs,fusb302"; reg = <0x22>; @@ -957,6 +1214,38 @@ fan_leds: pca9552@67 { "","","","", "","","",""; }; + + fan_leds_alt: pca9532@66 { + compatible = "nxp,pca9532"; + reg = <0x66>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "presence-fan0","presence-fan1", + "presence-fan2","presence-fan3", + "power-fan0-good","power-fan1-good", + "power-fan2-good","power-fan3-good", + "","","","", + "","","",""; + + led-0 { type = <PCA9532_TYPE_GPIO>; }; + led-1 { type = <PCA9532_TYPE_GPIO>; }; + led-2 { type = <PCA9532_TYPE_GPIO>; }; + led-3 { type = <PCA9532_TYPE_GPIO>; }; + led-4 { type = <PCA9532_TYPE_GPIO>; }; + led-5 { type = <PCA9532_TYPE_GPIO>; }; + led-6 { type = <PCA9532_TYPE_GPIO>; }; + led-7 { type = <PCA9532_TYPE_GPIO>; }; + led-8 { type = <PCA9532_TYPE_GPIO>; }; + led-9 { type = <PCA9532_TYPE_GPIO>; }; + led-10 { type = <PCA9532_TYPE_GPIO>; }; + led-11 { type = <PCA9532_TYPE_GPIO>; }; + led-12 { type = <PCA9532_TYPE_GPIO>; }; + led-13 { type = <PCA9532_TYPE_GPIO>; }; + led-14 { type = <PCA9532_TYPE_GPIO>; }; + led-15 { type = <PCA9532_TYPE_GPIO>; }; + }; }; &i2c13 { -- 2.53.0 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] ARM: dts: aspeed: bletchley: Add second source PCA9532 LED controllers 2026-07-14 12:08 ` [PATCH 2/2] ARM: dts: aspeed: bletchley: Add second source PCA9532 LED controllers Cosmo Chou @ 2026-07-14 12:28 ` sashiko-bot 0 siblings, 0 replies; 5+ messages in thread From: sashiko-bot @ 2026-07-14 12:28 UTC (permalink / raw) To: Cosmo Chou; +Cc: robh, conor+dt, devicetree Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider: New issues: - [High] The GPIO polarity flags for the alternative PCA9532 LED controllers are incorrectly copied verbatim from the PCA9552 nodes, resulting in inverted physical LED behavior. Pre-existing issues: - [High] The `leds-pca9532` driver ignores I2C write errors during initialization, causing it to successfully probe even if the hardware is completely absent, introducing phantom GPIOs and sysfs collisions. -- --- Patch [2]: [PATCH 2/2] ARM: dts: aspeed: bletchley: Add second source PCA9532 LED controllers --- commit be0c2ca182f94bd5b992463cc968b5837bdf819b Author: Cosmo Chou <chou.cosmo@gmail.com> ARM: dts: aspeed: bletchley: Add second source PCA9532 LED controllers This patch adds alternative PCA9532 LED controllers at address 0x66 to support boards populated with the PCA9532 instead of the primary PCA9552 at 0x67. > diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts > index a966be69ff27d..86e2b5aecdf94 100644 > --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts > +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts [ ... ] > @@ -113,6 +114,58 @@ led-7 { > }; > }; > > + fan_gpio_leds_alt { > + compatible = "gpio-leds"; > + led-0 { > + label = "fan0_blue"; > + retain-state-shutdown; > + default-state = "on"; > + gpios = <&fan_leds_alt 8 GPIO_ACTIVE_HIGH>; [Severity: High] Does this GPIO polarity result in inverted physical LED behavior? In drivers/leds/leds-pca955x.c, pca955x_gpio_set_value() maps val = 1 to PCA955X_LS_LED_OFF (HI-Z). Conversely, in drivers/leds/leds-pca9532.c, pca9532_gpio_set_value() maps val = 1 to PCA9532_ON (LOW). Since the PCA9532 driver maps the logical value to the opposite physical state compared to PCA9552, should this be GPIO_ACTIVE_LOW instead? > + }; [ ... ] > + sled1_gpio_leds_alt { > + compatible = "gpio-leds"; > + led-0 { > + label = "sled1_amber"; > + retain-state-shutdown; > + default-state = "keep"; > + gpios = <&sled1_leds_alt 0 GPIO_ACTIVE_LOW>; [Severity: High] Similarly, should this be GPIO_ACTIVE_HIGH? Since the physical circuit behavior for the PCA9532 differs from the PCA9552, using the same polarity here might cause the LEDs to turn off when userspace expects them to be on. > + }; [ ... ] > @@ -957,6 +1214,38 @@ fan_leds: pca9552@67 { > "","","","", > "","","",""; > }; > + > + fan_leds_alt: pca9532@66 { > + compatible = "nxp,pca9532"; > + reg = <0x66>; > + gpio-controller; [Severity: High] This isn't a bug introduced by this patch, but will this cause phantom GPIOs and sysfs collisions on boards where the PCA9532 is not populated? The leds-pca9532 driver ignores I2C write errors during initialization: drivers/leds/leds-pca9532.c:pca9532_configure() { ... i2c_smbus_write_byte_data(client, PCA9532_REG_PWM(maxleds, i), data->pwm[i]); i2c_smbus_write_byte_data(client, PCA9532_REG_PSC(maxleds, i), data->psc[i]); ... } Because it doesn't check the return codes, it will successfully probe even if the hardware is absent. This will register a phantom gpiochip with identical gpio-line-names on the same I2C bus. Subsequent user-space GPIO reads from this phantom chip will resolve to truncated NAK errors, yielding bogus hardware states for critical sensors like fan presence and power-good. > + #gpio-cells = <2>; > + > + gpio-line-names = > + "presence-fan0","presence-fan1", > + "presence-fan2","presence-fan3", > + "power-fan0-good","power-fan1-good", > + "power-fan2-good","power-fan3-good", > + "","","","", > + "","","",""; > + [ ... ] -- Sashiko AI review · https://sashiko.dev/#/patchset/20260714120816.1504058-1-chou.cosmo@gmail.com?part=2 ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2026-07-14 12:28 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-07-14 12:08 [PATCH 0/2] ARM: dts: aspeed: bletchley: Add second source devices Cosmo Chou 2026-07-14 12:08 ` [PATCH 1/2] ARM: dts: aspeed: bletchley: Add second source ISL1208 RTC Cosmo Chou 2026-07-14 12:18 ` sashiko-bot 2026-07-14 12:08 ` [PATCH 2/2] ARM: dts: aspeed: bletchley: Add second source PCA9532 LED controllers Cosmo Chou 2026-07-14 12:28 ` sashiko-bot
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