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From: sashiko-bot@kernel.org
To: "Nikolai Burov" <nikolai.burov@jolla.com>
Cc: devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH 3/3] pmdomain: mediatek: Add support for MT6858 SoC
Date: Tue, 14 Jul 2026 13:58:54 +0000	[thread overview]
Message-ID: <20260714135854.9F97B1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260714-mt6858-pmdomain-v1-3-4f09bbb822e0@jolla.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Missing `.sta2nd_mask` initialization for `MT6858_POWER_DOMAIN_MD` causes the power domain status polling to check the first acknowledgment bit twice, ignoring the second acknowledgment bit.
--

--- Patch [3]: [PATCH 3/3] pmdomain: mediatek: Add support for MT6858 SoC ---
commit c973791cdeb399024e52d84d14f8ed20c88d8b0f
Author: Nikolai Burov <nikolai.burov@jolla.com>

pmdomain: mediatek: Add support for MT6858 SoC

This commit adds support for the power domains found in the MediaTek MT6858 SoC.

> diff --git a/drivers/pmdomain/mediatek/mt6858-pm-domains.h b/drivers/pmdomain/mediatek/mt6858-pm-domains.h
> new file mode 100644
> index 0000000000000..6d85835115b4f
> --- /dev/null
> +++ b/drivers/pmdomain/mediatek/mt6858-pm-domains.h

[ ... ]

> +static const struct scpsys_domain_data scpsys_domain_data_mt6858[] = {
> +	[MT6858_POWER_DOMAIN_MD] = {
> +		.name = "md",
> +		.sta_mask = MT6858_PWR_ACK,
> +		.ctl_offs = 0xe00,
> +		.pwr_sta_offs = 0xe00,
> +		.pwr_sta2nd_offs = 0xe00,

[Severity: High]
Does this domain initialization miss the .sta2nd_mask assignment?

Looking at scpsys_domain_is_on() in drivers/pmdomain/mediatek/mtk-pm-domains.c,
if .sta2nd_mask is omitted, the polling logic falls back to reusing .sta_mask
for the second status check:

	mask2 = pd->data->sta2nd_mask ? pd->data->sta2nd_mask : mask;

	regmap_read(scpsys->base, pd->data->pwr_sta_offs, &status);
	status &= mask;

	regmap_read(scpsys->base, pd->data->pwr_sta2nd_offs, &status2);
	status2 &= mask2;

This would cause the polling loop in scpsys_power_off() to check the first
acknowledgment bit twice instead of verifying the hardware's secondary ACK bit,
returning early without waiting for the second ACK bit to clear.

Could this lead to disabling clocks and regulators before the hardware has
actually finished its power-off sequence, potentially causing a hardware
lockup or kernel crash during system suspend or runtime PM?

> +		.ext_buck_iso_offs = 0xf20,
> +		.ext_buck_iso_mask = GENMASK(1, 0),
> +		.caps = MTK_SCPD_MODEM_SECURE | MTK_SCPD_EXT_BUCK_ISO |
> +			MTK_SCPD_KEEP_DEFAULT_OFF,
> +	},
> +	[MT6858_POWER_DOMAIN_CONN] = {
> +		.name = "conn",
> +		.sta_mask = MT6858_PWR_ACK,
> +		.sta2nd_mask = MT6858_PWR_ACK_2ND,

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260714-mt6858-pmdomain-v1-0-4f09bbb822e0@jolla.com?part=3

      reply	other threads:[~2026-07-14 13:58 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-14 13:43 [PATCH 0/3] pmdomain: mediatek: Add MT6858 support Nikolai Burov via B4 Relay
2026-07-14 13:43 ` [PATCH 1/3] dt-bindings: power: Add MediaTek MT6858 power domain controller Nikolai Burov via B4 Relay
2026-07-14 13:49   ` sashiko-bot
2026-07-14 13:43 ` [PATCH 2/3] pmdomain: mediatek: Add support for secure modem power domain control Nikolai Burov via B4 Relay
2026-07-14 13:51   ` sashiko-bot
2026-07-14 15:28   ` Matthias Brugger
2026-07-14 13:43 ` [PATCH 3/3] pmdomain: mediatek: Add support for MT6858 SoC Nikolai Burov via B4 Relay
2026-07-14 13:58   ` sashiko-bot [this message]

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