Re: [PATCH v4 3/4] arm64: dts: qcom: Add PMIC thermal support for Shikra CQ2390M SoM platform

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Missing `polling-delay` in thermal zones using `generic-adc-thermal` renders thermal mitigation non-functional.
- [Medium] Mismatch between ADC channel definitions and pinctrl configurations causes bogus sensor readings.
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--- Patch [3]: [PATCH v4 3/4] arm64: dts: qcom: Add PMIC thermal support for Shikra CQ2390M SoM platform ---
commit 0bee643f0fa64e35671928d7a4baae1362c3d049
Author: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>

arm64: dts: qcom: Add PMIC thermal support for Shikra CQ2390M SoM platform

This commit adds ADC channels for pa, quiet, and msm thermistors along with
their ADC thermal bridge nodes. It also configures thermal zones for PMIC
thermal mitigation on the Shikra CQ2390M SoM platform.

> diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
> index dc3861489f64d..139d0ad0b1ab2 100644
> --- a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
> +++ b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi

[ ... ]

> +	thermal-zones {
> +		sys-1-thermal {
> +			polling-delay-passive = <2000>;
> +			thermal-sensors = <&pa_therm_bridge>;

[Severity: High]
Does this thermal zone require a polling-delay property to function correctly?

The generic-adc-thermal driver relies entirely on software polling by the
thermal core since it doesn't support hardware temperature interrupts. Because
the trips defined below are only "hot" and not for passive cooling, passive
cooling is never engaged.

Without a polling-delay property, the core defaults to 0 and might never
schedule the delayed work to read the ADC, effectively disabling thermal
mitigation.

> +
> +			trips {
> +				active-config0 {
> +					temperature = <80000>;
> +					hysteresis = <2000>;
> +					type = "hot";
> +				};
> +			};
> +		};

[ ... ]

> +&pm4125_adc {
> +	pinctrl-0 = <&pm4125_adc_gpio5_default>, <&pm4125_adc_gpio6_default>;
> +	pinctrl-names = "default";
> +
> +	channel@4d {
> +		reg = <ADC5_AMUX_THM1_100K_PU>;
> +		label = "pa_therm";

[ ... ]

> +	channel@54 {
> +		reg = <ADC5_GPIO3_100K_PU>;
> +		label = "chgr_skin";
> +		qcom,ratiometric;
> +		qcom,hw-settle-time = <200>;
> +		qcom,pre-scaling = <1 1>;
> +	};
> +
> +	channel@55 {
> +		reg = <ADC5_GPIO4_100K_PU>;
> +		label = "gnss_therm";

[Severity: Medium]
Is there a mismatch between the pinctrl configuration and the ADC channels
being added here?

The pinctrl property for the ADC node configures gpio5 and gpio6 for ADC use,
but these new channels are mapped to ADC5_GPIO3 and ADC5_GPIO4.

Will these channels read from unconfigured pins and produce incorrect
temperature readings?

> +		qcom,ratiometric;
> +		qcom,hw-settle-time = <200>;
> +		qcom,pre-scaling = <1 1>;
> +	};
>  };

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260715-shikra_adc_support-v4-0-5e07b6d21429@oss.qualcomm.com?part=3