Re: [PATCH v4 4/4] arm64: dts: qcom: Add PMIC thermal support for Shikra IQ2390S SoM platform

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Mismatched PMIC ADC channels and pinctrl configurations for thermistors.
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--- Patch [4]: [PATCH v4 4/4] arm64: dts: qcom: Add PMIC thermal support for Shikra IQ2390S SoM platform ---
commit 5e80ce0d3c9c4dc567c3d3d335a508d11f309e50
Author: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>

arm64: dts: qcom: Add PMIC thermal support for Shikra IQ2390S SoM platform

This commit adds ADC channels for system thermistors used for thermal
mitigation. It includes ADC_TM nodes for PA, quiet, and MSM thermistors,
along with corresponding thermal zones.

> diff --git a/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi b/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
> index 73945bf42112d..9ab0b44b00bed 100644
> --- a/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
> +++ b/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi

[ ... ]

> +&pm8150_adc {
> +	pinctrl-0 = <&pm8150_adc_gpio2_default>, <&pm8150_adc_gpio3_default>;
> +	pinctrl-names = "default";
> +

[ ... ]

> +	channel@52 {
> +		reg = <ADC5_GPIO1_100K_PU>;
> +		label = "gnss_therm";
> +		qcom,ratiometric;
> +		qcom,hw-settle-time = <200>;
> +		qcom,pre-scaling = <1 1>;
> +	};
> +
> +	channel@55 {
> +		reg = <ADC5_GPIO4_100K_PU>;
> +		label = "pa_therm";
> +		qcom,ratiometric;
> +		qcom,hw-settle-time = <200>;
> +		qcom,pre-scaling = <1 1>;
> +	};
> +};

[Severity: High]
Is there a mismatch between the pinctrl configurations and the ADC channels
being used?

The pinctrl-0 property specifies configurations for gpio2 and gpio3, but the
ADC channels instruct the hardware to read from ADC5_GPIO1 and ADC5_GPIO4.

Could this result in the gnss_therm and pa_therm thermal zones reading
garbage data since they point to unconfigured PMIC GPIOs?

If the unconfigured pins float to a voltage that translates to a temperature
above the 125°C trip point, it might cause spurious system shutdowns or
unnecessary throttling.

[ ... ]

>  &pm8150_gpios {
> +	pm8150_adc_gpio2_default: pm8150-adc-gpio2-state {
> +		pins = "gpio2";
> +		function = PMIC_GPIO_FUNC_NORMAL;
> +		bias-high-impedance;
> +	};
> +
> +	pm8150_adc_gpio3_default: pm8150-adc-gpio3-state {
> +		pins = "gpio3";
> +		function = PMIC_GPIO_FUNC_NORMAL;
> +		bias-high-impedance;
> +	};
> +

[Severity: High]
Because these configurations explicitly target gpio2 and gpio3 instead of the
pins actually used by the ADC, does forcing them into high-impedance mode
risk breaking or interfering with whatever hardware is actually connected
to them?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260715-shikra_adc_support-v4-0-5e07b6d21429@oss.qualcomm.com?part=4