Re: [PATCH v5 15/16] arm64: dts: mediatek: mt8195-cherry: Add M.2 E-key slot

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Removing the `wifi@0` node drops the `wakeup-source` property, breaking default Wake-on-WLAN (WoWLAN) configuration.
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--- Patch [15]: [PATCH v5 15/16] arm64: dts: mediatek: mt8195-cherry: Add M.2 E-key slot ---
commit a818c27444e50b0200c6065b8b79412ac5712494
Author: Chen-Yu Tsai <wenst@chromium.org>

arm64: dts: mediatek: mt8195-cherry: Add M.2 E-key slot

This patch adds an M.2 E-key slot for WiFi/BT combo cards on the
Mt8195 Cherry design. It replaces the PCIe wifi node and its vpcie3v3-supply
property with the new pcie-m2-e-connector representation.

> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> index ef7afc436aefc..8d4cc30d91e44 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
[ ... ]
> @@ -791,14 +832,14 @@ pcie@0 {
>  		reg = <0 0 0 0 0>;
>  		device_type = "pci";
>  		num-lanes = <1>;
> -		vpcie3v3-supply = <&pp3300_wlan>;
>  		#address-cells = <3>;
>  		#size-cells = <2>;
>  		ranges;
>  
> -		wifi@0 {
> -			reg = <0 0 0 0 0>;
> -			wakeup-source;
> +		port {
> +			pcie1_ep: endpoint {
> +				remote-endpoint = <&wifi_ep>;
> +			};
>  		};
>  	};
>  };

[Severity: Medium]
Does removing the wifi@0 node and its wakeup-source property break default
Wake-on-WLAN configuration?

The mt7921 PCIe Wi-Fi driver explicitly checks for this property during probe:

drivers/net/wireless/mediatek/mt76/mt7921/pci.c:
    if (of_property_read_bool(dev->mt76.dev->of_node, "wakeup-source"))
        device_init_wakeup(..., true);

By completely replacing the wifi@0 child node with an OF graph port under
the PCIe root port, the PCI endpoint device loses its of_node instantiation
and the driver cannot find the wakeup-source property.

Should the port node be placed inside the wifi@0 node so the PCI device
retains its Device Tree bindings?

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Sashiko AI review · https://sashiko.dev/#/patchset/20260715085348.3457359-1-wenst@chromium.org?part=15