Re: [PATCH v3 3/4] arm64: dts: qcom: Enable Primary USB controller on Shikra CQM platform

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The `usb_2` controller incorrectly assigns `GCC_CFG_NOC_USB2_PRIM_AXI_CLK` to its `iface` clock instead of the correct system NOC clock `GCC_SYS_NOC_USB2_PRIM_AXI_CLK`.
- [Medium] Missing `dr_mode = "peripheral"` property in the `usb_1` node overlay, causing the controller to fail to initialize in device mode.
--

--- Patch [3]: [PATCH v3 3/4] arm64: dts: qcom: Enable Primary USB controller on Shikra CQM platform ---
commit e2592f76c437910744ef5b9caed7e31cf607381b
Author: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>

arm64: dts: qcom: Enable Primary USB controller on Shikra CQM platform

This commit enables the primary USB controller in device mode on the
Shikra CQM platform. It enables the usb_1, usb_1_hsphy, and usb_qmpphy
nodes with their respective supply regulators.

> diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
> index 0a52ab9b7a4c3..9867160470a8e 100644
> --- a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
> +++ b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
> @@ -38,3 +38,22 @@ &sdhc_1 {
>  
>  	status = "okay";
>  };
> +
> +&usb_1 {
> +	status = "okay";
> +};

[Severity: Medium]
The commit message mentions enabling the primary USB controller in device
mode, but this node doesn't specify the mode.

Without dr_mode = "peripheral", won't the DWC3 core default to OTG mode
and prevent the Qualcomm specific VBUS override from being enabled, causing
the port to fail to enumerate as a device?

Should dr_mode = "peripheral" be added here to ensure it operates in device
mode as intended?

[ ... ]

The following issue was also found in arch/arm64/boot/dts/qcom/shikra.dtsi:

> 			clocks = <&gcc GCC_CFG_NOC_USB2_PRIM_AXI_CLK>,
> 				 <&gcc GCC_USB20_MASTER_CLK>,
> 				 <&gcc GCC_CFG_NOC_USB2_PRIM_AXI_CLK>,

[Severity: High]
Does this code incorrectly assign GCC_CFG_NOC_USB2_PRIM_AXI_CLK to the usb_2
iface clock instead of the correct system NOC clock
GCC_SYS_NOC_USB2_PRIM_AXI_CLK?

Supplying the configuration NOC clock instead of the system NOC clock for the
iface clock will result in the SYS_NOC clock not being appropriately enabled
during USB AXI transactions. Can this cause AXI bus hangs or access faults,
which could lead to system panics or freezes?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260716-shikra-usb-dt-v3-v3-0-13f73a0571bb@oss.qualcomm.com?part=3