* [PATCH 0/3] Add i.MX93 Wireless FRDM board support
@ 2026-07-17 5:11 Joseph Guo
2026-07-17 5:11 ` [PATCH 1/3] arm64: dts: imx93-11x11-frdm: factor out common parts into dtsi Joseph Guo
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Joseph Guo @ 2026-07-17 5:11 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, Joseph Guo
i.MX93 Wireless FRDM board(FRDM-IMX93W) is a low-cost and compact board featuring
the i.MX93W applications processor
FRDM-IMX93W board basically reuse the FRDM-IMX93 board, with some minor functional
and pin connection differences. Factor common parts of FRDM-IMX93 and FRDM-IMX93W
into imx93-11x11-frdm-common.dtsi and add the board-specific changes.
Signed-off-by: Joseph Guo <qijian.guo@nxp.com>
---
Joseph Guo (3):
arm64: dts: imx93-11x11-frdm: factor out common parts into dtsi
dt-bindings: arm: fsl: Add i.MX93 Wireless FRDM board
arm64: dts: imx93: Add i.MX93 Wireless FRDM board support
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
arch/arm64/boot/dts/freescale/Makefile | 1 +
.../dts/freescale/imx93-11x11-frdm-common.dtsi | 692 +++++++++++++++++++++
arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts | 686 +-------------------
arch/arm64/boot/dts/freescale/imx93w-frdm.dts | 23 +
5 files changed, 719 insertions(+), 684 deletions(-)
---
base-commit: b8809969e1d7a591e0f49dd464a5d04b3cf02ab1
change-id: 20260716-imx93w_frdm-2528ada72343
Best regards,
--
Joseph Guo <qijian.guo@nxp.com>
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/3] arm64: dts: imx93-11x11-frdm: factor out common parts into dtsi
2026-07-17 5:11 [PATCH 0/3] Add i.MX93 Wireless FRDM board support Joseph Guo
@ 2026-07-17 5:11 ` Joseph Guo
2026-07-17 5:19 ` sashiko-bot
2026-07-17 16:29 ` Frank Li
2026-07-17 5:11 ` [PATCH 2/3] dt-bindings: arm: fsl: Add i.MX93 Wireless FRDM board Joseph Guo
2026-07-17 5:11 ` [PATCH 3/3] arm64: dts: imx93: Add i.MX93 Wireless FRDM board support Joseph Guo
2 siblings, 2 replies; 8+ messages in thread
From: Joseph Guo @ 2026-07-17 5:11 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, Joseph Guo
The i.MX93 Wireless FRDM board reuses most of the i.MX93 FRDM board.
To avoid duplication and DTS-to-DTS includes, extract common hardware
definitions from imx93-11x11-frdm.dts into imx93-11x11-frdm-common.dtsi
to allow the common description shared by both boards.
The FRDM-IMX93 board-specific .dts now includes the common dtsi and only
contains board-specific overrides.
Signed-off-by: Joseph Guo <qijian.guo@nxp.com>
---
.../dts/freescale/imx93-11x11-frdm-common.dtsi | 692 +++++++++++++++++++++
arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts | 686 +-------------------
2 files changed, 694 insertions(+), 684 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..69e23570f71f40a3f3517d31e16a9ca1d3dfb1f2
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi
@@ -0,0 +1,692 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include <dt-bindings/usb/pd.h>
+
+/ {
+
+ aliases {
+ can0 = &flexcan2;
+ ethernet0 = &fec;
+ ethernet1 = &eqos;
+ i2c0 = &lpi2c1;
+ i2c1 = &lpi2c2;
+ i2c2 = &lpi2c3;
+ mmc0 = &usdhc1; /* EMMC */
+ mmc1 = &usdhc2; /* uSD */
+ rtc0 = &pcf2131;
+ serial0 = &lpuart1;
+ serial4 = &lpuart5;
+ };
+
+ chosen {
+ stdout-path = &lpuart1;
+ };
+
+ flexcan2_phy: can-phy {
+ compatible = "nxp,tja1051";
+ #phy-cells = <0>;
+ max-bitrate = <5000000>;
+ silent-gpios = <&pcal6524 23 GPIO_ACTIVE_HIGH>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ button-k2 {
+ label = "Button K2";
+ linux,code = <BTN_1>;
+ gpios = <&pcal6524 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ interrupt-parent = <&pcal6524>;
+ interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
+ };
+
+ button-k3 {
+ label = "Button K3";
+ linux,code = <BTN_2>;
+ gpios = <&pcal6524 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ interrupt-parent = <&pcal6524>;
+ interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
+ };
+ };
+
+ reg_usdhc2_vmmc: regulator-usdhc2 {
+ compatible = "regulator-fixed";
+ off-on-delay-us = <12000>;
+ pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
+ pinctrl-names = "default";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "VSD_3V3";
+ vin-supply = <&buck4>;
+ gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reserved-memory {
+ ranges;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ linux,cma {
+ compatible = "shared-dma-pool";
+ alloc-ranges = <0 0x80000000 0 0x30000000>;
+ reusable;
+ size = <0 0x10000000>;
+ linux,cma-default;
+ };
+
+ rsc_table: rsc-table@2021e000 {
+ reg = <0 0x2021e000 0 0x1000>;
+ no-map;
+ };
+
+ vdev0vring0: vdev0vring0@a4000000 {
+ reg = <0 0xa4000000 0 0x8000>;
+ no-map;
+ };
+
+ vdev0vring1: vdev0vring1@a4008000 {
+ reg = <0 0xa4008000 0 0x8000>;
+ no-map;
+ };
+
+ vdev1vring0: vdev1vring0@a4010000 {
+ reg = <0 0xa4010000 0 0x8000>;
+ no-map;
+ };
+
+ vdev1vring1: vdev1vring1@a4018000 {
+ reg = <0 0xa4018000 0 0x8000>;
+ no-map;
+ };
+
+ vdevbuffer: vdevbuffer@a4020000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0xa4020000 0 0x100000>;
+ no-map;
+ };
+ };
+};
+
+&adc1 {
+ vref-supply = <&buck5>;
+ status = "okay";
+};
+
+&mu1 {
+ status = "okay";
+};
+
+&cm33 {
+ mboxes = <&mu1 0 1>,
+ <&mu1 1 1>,
+ <&mu1 3 1>;
+ mbox-names = "tx", "rx", "rxdb";
+ memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
+ <&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
+ status = "okay";
+};
+
+&eqos {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_eqos>;
+ pinctrl-1 = <&pinctrl_eqos_sleep>;
+ phy-handle = <ðphy1>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <5000000>;
+
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <80000>;
+ reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>;
+ realtek,clkout-disable;
+ };
+ };
+};
+
+&fec {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_fec>;
+ pinctrl-1 = <&pinctrl_fec_sleep>;
+ phy-mode = "rgmii-id";
+ phy-handle = <ðphy2>;
+ fsl,magic-packet;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <5000000>;
+
+ ethphy2: ethernet-phy@2 {
+ reg = <2>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <80000>;
+ reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>;
+ realtek,clkout-disable;
+ };
+ };
+};
+
+&flexcan2 {
+ phys = <&flexcan2_phy>;
+ pinctrl-0 = <&pinctrl_flexcan2>;
+ pinctrl-1 = <&pinctrl_flexcan2_sleep>;
+ pinctrl-names = "default", "sleep";
+ status = "okay";
+};
+
+&lpi2c1 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&pinctrl_lpi2c1>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ pcal6408: gpio@20 {
+ compatible = "nxp,pcal6408";
+ reg = <0x20>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ reset-gpios = <&pcal6524 20 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&lpi2c2 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&pinctrl_lpi2c2>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ pcal6524: gpio@22 {
+ compatible = "nxp,pcal6524";
+ reg = <0x22>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&gpio3>;
+ interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ pinctrl-0 = <&pinctrl_pcal6524>;
+ pinctrl-names = "default";
+ /* does not boot with supplier set, because it is the bucks interrupt parent */
+ /* vcc-supply = <&buck4>; */
+ };
+
+ pmic@25 {
+ compatible = "nxp,pca9451a";
+ reg = <0x25>;
+ interrupt-parent = <&pcal6524>;
+ interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
+
+ regulators {
+
+ buck1: BUCK1 {
+ regulator-name = "VDD_SOC_0V8";
+ regulator-min-microvolt = <610000>;
+ regulator-max-microvolt = <950000>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2: BUCK2 {
+ regulator-name = "LPD4_x_VDDQ_0V6";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <670000>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck4: BUCK4 {
+ regulator-name = "VDD_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ buck5: BUCK5 {
+ regulator-name = "VDD_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ buck6: BUCK6 {
+ regulator-name = "LPD4_x_VDD2_1V1";
+ regulator-min-microvolt = <1060000>;
+ regulator-max-microvolt = <1140000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo1: LDO1 {
+ regulator-name = "NVCC_BBSM_1V8";
+ regulator-min-microvolt = <1620000>;
+ regulator-max-microvolt = <1980000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo4: LDO4 {
+ regulator-name = "VDD_ANA_0V8";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <840000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo5: LDO5 {
+ regulator-name = "NVCC_SD";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ };
+ };
+
+ eeprom: eeprom@50 {
+ compatible = "atmel,24c256";
+ reg = <0x50>;
+ pagesize = <64>;
+ vcc-supply = <&buck4>;
+ };
+};
+
+&lpi2c3 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&pinctrl_lpi2c3>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ ptn5110: tcpc@50 {
+ compatible = "nxp,ptn5110", "tcpci";
+ reg = <0x50>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
+
+ typec1_con: connector {
+ compatible = "usb-c-connector";
+ data-role = "dual";
+ label = "USB-C";
+ op-sink-microwatt = <15000000>;
+ power-role = "dual";
+ self-powered;
+ sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
+ PDO_VAR(5000, 20000, 3000)>;
+ source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+ try-power-role = "sink";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ typec1_dr_sw: endpoint {
+ remote-endpoint = <&usb1_drd_sw>;
+ };
+ };
+ };
+ };
+ };
+
+ pcf2131: rtc@53 {
+ compatible = "nxp,pcf2131";
+ reg = <0x53>;
+ interrupt-parent = <&pcal6524>;
+ interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+ };
+};
+
+&lpuart1 { /* console */
+ pinctrl-0 = <&pinctrl_uart1>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&lpuart5 {
+ pinctrl-0 = <&pinctrl_uart5>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "nxp,88w8987-bt";
+ device-wakeup-gpios = <&pcal6408 3 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&pcal6524 19 GPIO_ACTIVE_LOW>;
+ vcc-supply = <®_usdhc3_vmmc>;
+ };
+};
+
+&usbotg1 {
+ adp-disable;
+ disable-over-current;
+ dr_mode = "otg";
+ hnp-disable;
+ srp-disable;
+ usb-role-switch;
+ samsung,picophy-dc-vol-level-adjust = <7>;
+ samsung,picophy-pre-emp-curr-control = <3>;
+ status = "okay";
+
+ port {
+ usb1_drd_sw: endpoint {
+ remote-endpoint = <&typec1_dr_sw>;
+ };
+ };
+};
+
+&usbotg2 {
+ disable-over-current;
+ dr_mode = "host";
+ samsung,picophy-dc-vol-level-adjust = <7>;
+ samsung,picophy-pre-emp-curr-control = <3>;
+ status = "okay";
+};
+
+&usdhc1 {
+ bus-width = <8>;
+ non-removable;
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ vmmc-supply = <&buck4>;
+ status = "okay";
+};
+
+&usdhc2 {
+ bus-width = <4>;
+ cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
+ no-mmc;
+ no-sdio;
+ pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
+ vmmc-supply = <®_usdhc2_vmmc>;
+ status = "okay";
+};
+
+&wdog3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdog>;
+ fsl,ext-reset-output;
+ status = "okay";
+};
+
+&iomuxc {
+
+ pinctrl_eqos: eqosgrp {
+ fsl,pins = <
+ MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x57e
+ MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e
+ MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e
+ MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e
+ MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e
+ MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e
+ MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x58e
+ MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e
+ MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e
+ MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x57e
+ MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e
+ MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e
+ MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x58e
+ MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e
+ >;
+ };
+
+ pinctrl_eqos_sleep: eqossleepgrp {
+ fsl,pins = <
+ MX93_PAD_ENET1_MDC__GPIO4_IO00 0x31e
+ MX93_PAD_ENET1_MDIO__GPIO4_IO01 0x31e
+ MX93_PAD_ENET1_RD0__GPIO4_IO10 0x31e
+ MX93_PAD_ENET1_RD1__GPIO4_IO11 0x31e
+ MX93_PAD_ENET1_RD2__GPIO4_IO12 0x31e
+ MX93_PAD_ENET1_RD3__GPIO4_IO13 0x31e
+ MX93_PAD_ENET1_RXC__GPIO4_IO09 0x31e
+ MX93_PAD_ENET1_RX_CTL__GPIO4_IO08 0x31e
+ MX93_PAD_ENET1_TD0__GPIO4_IO05 0x31e
+ MX93_PAD_ENET1_TD1__GPIO4_IO04 0x31e
+ MX93_PAD_ENET1_TD2__GPIO4_IO03 0x31e
+ MX93_PAD_ENET1_TD3__GPIO4_IO02 0x31e
+ MX93_PAD_ENET1_TXC__GPIO4_IO07 0x31e
+ MX93_PAD_ENET1_TX_CTL__GPIO4_IO06 0x31e
+ >;
+ };
+
+ pinctrl_fec: fecgrp {
+ fsl,pins = <
+ MX93_PAD_ENET2_MDC__ENET1_MDC 0x57e
+ MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x57e
+ MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e
+ MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e
+ MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e
+ MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e
+ MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x58e
+ MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
+ MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e
+ MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e
+ MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e
+ MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e
+ MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x58e
+ MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
+ >;
+ };
+
+ pinctrl_fec_sleep: fecsleepgrp {
+ fsl,pins = <
+ MX93_PAD_ENET2_MDC__GPIO4_IO14 0x51e
+ MX93_PAD_ENET2_MDIO__GPIO4_IO15 0x51e
+ MX93_PAD_ENET2_RD0__GPIO4_IO24 0x51e
+ MX93_PAD_ENET2_RD1__GPIO4_IO25 0x51e
+ MX93_PAD_ENET2_RD2__GPIO4_IO26 0x51e
+ MX93_PAD_ENET2_RD3__GPIO4_IO27 0x51e
+ MX93_PAD_ENET2_RXC__GPIO4_IO23 0x51e
+ MX93_PAD_ENET2_RX_CTL__GPIO4_IO22 0x51e
+ MX93_PAD_ENET2_TD0__GPIO4_IO19 0x51e
+ MX93_PAD_ENET2_TD1__GPIO4_IO18 0x51e
+ MX93_PAD_ENET2_TD2__GPIO4_IO17 0x51e
+ MX93_PAD_ENET2_TD3__GPIO4_IO16 0x51e
+ MX93_PAD_ENET2_TXC__GPIO4_IO21 0x51e
+ MX93_PAD_ENET2_TX_CTL__GPIO4_IO20 0x51e
+ >;
+ };
+
+ pinctrl_flexcan2: flexcan2grp {
+ fsl,pins = <
+ MX93_PAD_GPIO_IO25__CAN2_TX 0x139e
+ MX93_PAD_GPIO_IO27__CAN2_RX 0x139e
+ >;
+ };
+
+ pinctrl_flexcan2_sleep: flexcan2sleepgrp {
+ fsl,pins = <
+ MX93_PAD_GPIO_IO25__GPIO2_IO25 0x31e
+ MX93_PAD_GPIO_IO27__GPIO2_IO27 0x31e
+ >;
+ };
+
+ pinctrl_lpi2c1: lpi2c1grp {
+ fsl,pins = <
+ MX93_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e
+ MX93_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e
+ >;
+ };
+
+ pinctrl_lpi2c2: lpi2c2grp {
+ fsl,pins = <
+ MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e
+ MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e
+ >;
+ };
+
+ pinctrl_lpi2c3: lpi2c3grp {
+ fsl,pins = <
+ MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e
+ MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e
+ >;
+ };
+
+ pinctrl_pcal6524: pcal6524grp {
+ fsl,pins = <
+ MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e
+ >;
+ };
+
+ pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
+ fsl,pins = <
+ MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
+ MX93_PAD_UART1_TXD__LPUART1_TX 0x31e
+ >;
+ };
+
+ pinctrl_uart5: uart5grp {
+ fsl,pins = <
+ MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX 0x31e
+ MX93_PAD_DAP_TDI__LPUART5_RX 0x31e
+ MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x31e
+ MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B 0x31e
+ >;
+ };
+
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX93_PAD_SD1_CLK__USDHC1_CLK 0x1582
+ MX93_PAD_SD1_CMD__USDHC1_CMD 0x40001382
+ MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x40001382
+ MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x40001382
+ MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x40001382
+ MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x40001382
+ MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x40001382
+ MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x40001382
+ MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x40001382
+ MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x40001382
+ MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x1582
+ >;
+ };
+
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
+ pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
+ fsl,pins = <
+ MX93_PAD_SD1_CLK__USDHC1_CLK 0x158e
+ MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000138e
+ MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e
+ MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x4000138e
+ MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x4000138e
+ MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x4000138e
+ MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x4000138e
+ MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x4000138e
+ MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x4000138e
+ MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x4000138e
+ MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x158e
+ >;
+ };
+
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
+ pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
+ fsl,pins = <
+ MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe
+ MX93_PAD_SD1_CMD__USDHC1_CMD 0x400013fe
+ MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x400013fe
+ MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x400013fe
+ MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013fe
+ MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x400013fe
+ MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x400013fe
+ MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x400013fe
+ MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x400013fe
+ MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x400013fe
+ MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe
+ >;
+ };
+
+ pinctrl_usdhc2_gpio: usdhc2gpiogrp {
+ fsl,pins = <
+ MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
+ >;
+ };
+
+ pinctrl_usdhc2_gpio_sleep: usdhc2gpiosleepgrp {
+ fsl,pins = <
+ MX93_PAD_SD2_CD_B__GPIO3_IO00 0x51e
+ >;
+ };
+
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX93_PAD_SD2_CLK__USDHC2_CLK 0x1582
+ MX93_PAD_SD2_CMD__USDHC2_CMD 0x40001382
+ MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x40001382
+ MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x40001382
+ MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x40001382
+ MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x40001382
+ MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
+ >;
+ };
+
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
+ fsl,pins = <
+ MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e
+ MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000138e
+ MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e
+ MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e
+ MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e
+ MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000138e
+ MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
+ >;
+ };
+
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
+ fsl,pins = <
+ MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe
+ MX93_PAD_SD2_CMD__USDHC2_CMD 0x400013fe
+ MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x400013fe
+ MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x400013fe
+ MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x400013fe
+ MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe
+ MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
+ >;
+ };
+
+ pinctrl_usdhc2_sleep: usdhc2-sleepgrp {
+ fsl,pins = <
+ MX93_PAD_SD2_CLK__GPIO3_IO01 0x51e
+ MX93_PAD_SD2_CMD__GPIO3_IO02 0x51e
+ MX93_PAD_SD2_DATA0__GPIO3_IO03 0x51e
+ MX93_PAD_SD2_DATA1__GPIO3_IO04 0x51e
+ MX93_PAD_SD2_DATA2__GPIO3_IO05 0x51e
+ MX93_PAD_SD2_DATA3__GPIO3_IO06 0x51e
+ MX93_PAD_SD2_VSELECT__GPIO3_IO19 0x51e
+ >;
+ };
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <
+ MX93_PAD_WDOG_ANY__WDOG1_WDOG_ANY 0x31e
+ >;
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
index bd14ba28690c081817111aaabef12fb56a7c56a4..f2a31a0eacabff07532aee989eebd75a0c3e22e0 100644
--- a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
@@ -1,71 +1,14 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
/dts-v1/;
-#include <dt-bindings/usb/pd.h>
#include "imx93.dtsi"
+#include "imx93-11x11-frdm-common.dtsi"
/ {
compatible = "fsl,imx93-11x11-frdm", "fsl,imx93";
model = "NXP i.MX93 11X11 FRDM board";
- aliases {
- can0 = &flexcan2;
- ethernet0 = &fec;
- ethernet1 = &eqos;
- i2c0 = &lpi2c1;
- i2c1 = &lpi2c2;
- i2c2 = &lpi2c3;
- mmc0 = &usdhc1; /* EMMC */
- mmc1 = &usdhc2; /* uSD */
- rtc0 = &pcf2131;
- serial0 = &lpuart1;
- serial4 = &lpuart5;
- };
-
- chosen {
- stdout-path = &lpuart1;
- };
-
- flexcan2_phy: can-phy {
- compatible = "nxp,tja1051";
- #phy-cells = <0>;
- max-bitrate = <5000000>;
- silent-gpios = <&pcal6524 23 GPIO_ACTIVE_HIGH>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
-
- button-k2 {
- label = "Button K2";
- linux,code = <BTN_1>;
- gpios = <&pcal6524 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- interrupt-parent = <&pcal6524>;
- interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
- };
-
- button-k3 {
- label = "Button K3";
- linux,code = <BTN_2>;
- gpios = <&pcal6524 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- interrupt-parent = <&pcal6524>;
- interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
- };
- };
-
- reg_usdhc2_vmmc: regulator-usdhc2 {
- compatible = "regulator-fixed";
- off-on-delay-us = <12000>;
- pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
- pinctrl-names = "default";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "VSD_3V3";
- vin-supply = <&buck4>;
- gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
reg_usdhc3_vmmc: regulator-usdhc3 {
compatible = "regulator-fixed";
regulator-name = "VPCIe_3V3";
@@ -76,51 +19,6 @@ reg_usdhc3_vmmc: regulator-usdhc3 {
enable-active-high;
};
- reserved-memory {
- ranges;
- #address-cells = <2>;
- #size-cells = <2>;
-
- linux,cma {
- compatible = "shared-dma-pool";
- alloc-ranges = <0 0x80000000 0 0x30000000>;
- reusable;
- size = <0 0x10000000>;
- linux,cma-default;
- };
-
- rsc_table: rsc-table@2021e000 {
- reg = <0 0x2021e000 0 0x1000>;
- no-map;
- };
-
- vdev0vring0: vdev0vring0@a4000000 {
- reg = <0 0xa4000000 0 0x8000>;
- no-map;
- };
-
- vdev0vring1: vdev0vring1@a4008000 {
- reg = <0 0xa4008000 0 0x8000>;
- no-map;
- };
-
- vdev1vring0: vdev1vring0@a4010000 {
- reg = <0 0xa4010000 0 0x8000>;
- no-map;
- };
-
- vdev1vring1: vdev1vring1@a4018000 {
- reg = <0 0xa4018000 0 0x8000>;
- no-map;
- };
-
- vdevbuffer: vdevbuffer@a4020000 {
- compatible = "shared-dma-pool";
- reg = <0 0xa4020000 0 0x100000>;
- no-map;
- };
- };
-
sound-mqs {
compatible = "fsl,imx-audio-mqs";
model = "mqs-audio";
@@ -134,269 +32,6 @@ usdhc3_pwrseq: mmc-pwrseq {
};
};
-&adc1 {
- vref-supply = <&buck5>;
- status = "okay";
-};
-
-&mu1 {
- status = "okay";
-};
-
-&cm33 {
- mboxes = <&mu1 0 1>,
- <&mu1 1 1>,
- <&mu1 3 1>;
- mbox-names = "tx", "rx", "rxdb";
- memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
- <&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
- status = "okay";
-};
-
-&eqos {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&pinctrl_eqos>;
- pinctrl-1 = <&pinctrl_eqos_sleep>;
- phy-handle = <ðphy1>;
- phy-mode = "rgmii-id";
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
- clock-frequency = <5000000>;
-
- ethphy1: ethernet-phy@1 {
- reg = <1>;
- reset-assert-us = <10000>;
- reset-deassert-us = <80000>;
- reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>;
- realtek,clkout-disable;
- };
- };
-};
-
-&fec {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&pinctrl_fec>;
- pinctrl-1 = <&pinctrl_fec_sleep>;
- phy-mode = "rgmii-id";
- phy-handle = <ðphy2>;
- fsl,magic-packet;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- clock-frequency = <5000000>;
-
- ethphy2: ethernet-phy@2 {
- reg = <2>;
- reset-assert-us = <10000>;
- reset-deassert-us = <80000>;
- reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>;
- realtek,clkout-disable;
- };
- };
-};
-
-&flexcan2 {
- phys = <&flexcan2_phy>;
- pinctrl-0 = <&pinctrl_flexcan2>;
- pinctrl-1 = <&pinctrl_flexcan2_sleep>;
- pinctrl-names = "default", "sleep";
- status = "okay";
-};
-
-&lpi2c1 {
- clock-frequency = <400000>;
- pinctrl-0 = <&pinctrl_lpi2c1>;
- pinctrl-names = "default";
- status = "okay";
-
- pcal6408: gpio@20 {
- compatible = "nxp,pcal6408";
- reg = <0x20>;
- #gpio-cells = <2>;
- gpio-controller;
- reset-gpios = <&pcal6524 20 GPIO_ACTIVE_LOW>;
- };
-};
-
-&lpi2c2 {
- clock-frequency = <400000>;
- pinctrl-0 = <&pinctrl_lpi2c2>;
- pinctrl-names = "default";
- status = "okay";
-
- pcal6524: gpio@22 {
- compatible = "nxp,pcal6524";
- reg = <0x22>;
- #interrupt-cells = <2>;
- interrupt-controller;
- interrupt-parent = <&gpio3>;
- interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
- #gpio-cells = <2>;
- gpio-controller;
- pinctrl-0 = <&pinctrl_pcal6524>;
- pinctrl-names = "default";
- /* does not boot with supplier set, because it is the bucks interrupt parent */
- /* vcc-supply = <&buck4>; */
- };
-
- pmic@25 {
- compatible = "nxp,pca9451a";
- reg = <0x25>;
- interrupt-parent = <&pcal6524>;
- interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
-
- regulators {
-
- buck1: BUCK1 {
- regulator-name = "VDD_SOC_0V8";
- regulator-min-microvolt = <610000>;
- regulator-max-microvolt = <950000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-ramp-delay = <3125>;
- };
-
- buck2: BUCK2 {
- regulator-name = "LPD4_x_VDDQ_0V6";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <670000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-ramp-delay = <3125>;
- };
-
- buck4: BUCK4 {
- regulator-name = "VDD_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- buck5: BUCK5 {
- regulator-name = "VDD_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- buck6: BUCK6 {
- regulator-name = "LPD4_x_VDD2_1V1";
- regulator-min-microvolt = <1060000>;
- regulator-max-microvolt = <1140000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- ldo1: LDO1 {
- regulator-name = "NVCC_BBSM_1V8";
- regulator-min-microvolt = <1620000>;
- regulator-max-microvolt = <1980000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- ldo4: LDO4 {
- regulator-name = "VDD_ANA_0V8";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <840000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- ldo5: LDO5 {
- regulator-name = "NVCC_SD";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- };
- };
- };
-
- eeprom: eeprom@50 {
- compatible = "atmel,24c256";
- reg = <0x50>;
- pagesize = <64>;
- vcc-supply = <&buck4>;
- };
-};
-
-&lpi2c3 {
- clock-frequency = <400000>;
- pinctrl-0 = <&pinctrl_lpi2c3>;
- pinctrl-names = "default";
- status = "okay";
-
- ptn5110: tcpc@50 {
- compatible = "nxp,ptn5110", "tcpci";
- reg = <0x50>;
- interrupt-parent = <&gpio3>;
- interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
-
- typec1_con: connector {
- compatible = "usb-c-connector";
- data-role = "dual";
- label = "USB-C";
- op-sink-microwatt = <15000000>;
- power-role = "dual";
- self-powered;
- sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
- PDO_VAR(5000, 20000, 3000)>;
- source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
- try-power-role = "sink";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- typec1_dr_sw: endpoint {
- remote-endpoint = <&usb1_drd_sw>;
- };
- };
- };
- };
- };
-
- pcf2131: rtc@53 {
- compatible = "nxp,pcf2131";
- reg = <0x53>;
- interrupt-parent = <&pcal6524>;
- interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
- };
-};
-
-&lpuart1 { /* console */
- pinctrl-0 = <&pinctrl_uart1>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&lpuart5 {
- pinctrl-0 = <&pinctrl_uart5>;
- pinctrl-names = "default";
- status = "okay";
-
- uart-has-rtscts;
-
- bluetooth {
- compatible = "nxp,88w8987-bt";
- device-wakeup-gpios = <&pcal6408 3 GPIO_ACTIVE_HIGH>;
- reset-gpios = <&pcal6524 19 GPIO_ACTIVE_LOW>;
- vcc-supply = <®_usdhc3_vmmc>;
- };
-};
-
&mqs1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mqs1>;
@@ -418,57 +53,6 @@ &sai1 {
status = "okay";
};
-&usbotg1 {
- adp-disable;
- disable-over-current;
- dr_mode = "otg";
- hnp-disable;
- srp-disable;
- usb-role-switch;
- samsung,picophy-dc-vol-level-adjust = <7>;
- samsung,picophy-pre-emp-curr-control = <3>;
- status = "okay";
-
- port {
- usb1_drd_sw: endpoint {
- remote-endpoint = <&typec1_dr_sw>;
- };
- };
-};
-
-&usbotg2 {
- disable-over-current;
- dr_mode = "host";
- samsung,picophy-dc-vol-level-adjust = <7>;
- samsung,picophy-pre-emp-curr-control = <3>;
- status = "okay";
-};
-
-&usdhc1 {
- bus-width = <8>;
- non-removable;
- pinctrl-0 = <&pinctrl_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- vmmc-supply = <&buck4>;
- status = "okay";
-};
-
-&usdhc2 {
- bus-width = <4>;
- cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
- no-mmc;
- no-sdio;
- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
- pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
- pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
- pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>;
- pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
- vmmc-supply = <®_usdhc2_vmmc>;
- status = "okay";
-};
-
&usdhc3 {
bus-width = <4>;
keep-power-in-suspend;
@@ -483,126 +67,8 @@ &usdhc3 {
status = "okay";
};
-&wdog3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wdog>;
- fsl,ext-reset-output;
- status = "okay";
-};
&iomuxc {
-
- pinctrl_eqos: eqosgrp {
- fsl,pins = <
- MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x57e
- MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e
- MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e
- MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e
- MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e
- MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e
- MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x58e
- MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e
- MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e
- MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x57e
- MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e
- MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e
- MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x58e
- MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e
- >;
- };
-
- pinctrl_eqos_sleep: eqossleepgrp {
- fsl,pins = <
- MX93_PAD_ENET1_MDC__GPIO4_IO00 0x31e
- MX93_PAD_ENET1_MDIO__GPIO4_IO01 0x31e
- MX93_PAD_ENET1_RD0__GPIO4_IO10 0x31e
- MX93_PAD_ENET1_RD1__GPIO4_IO11 0x31e
- MX93_PAD_ENET1_RD2__GPIO4_IO12 0x31e
- MX93_PAD_ENET1_RD3__GPIO4_IO13 0x31e
- MX93_PAD_ENET1_RXC__GPIO4_IO09 0x31e
- MX93_PAD_ENET1_RX_CTL__GPIO4_IO08 0x31e
- MX93_PAD_ENET1_TD0__GPIO4_IO05 0x31e
- MX93_PAD_ENET1_TD1__GPIO4_IO04 0x31e
- MX93_PAD_ENET1_TD2__GPIO4_IO03 0x31e
- MX93_PAD_ENET1_TD3__GPIO4_IO02 0x31e
- MX93_PAD_ENET1_TXC__GPIO4_IO07 0x31e
- MX93_PAD_ENET1_TX_CTL__GPIO4_IO06 0x31e
- >;
- };
-
- pinctrl_fec: fecgrp {
- fsl,pins = <
- MX93_PAD_ENET2_MDC__ENET1_MDC 0x57e
- MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x57e
- MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e
- MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e
- MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e
- MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e
- MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x58e
- MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
- MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e
- MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e
- MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e
- MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e
- MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x58e
- MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
- >;
- };
-
- pinctrl_fec_sleep: fecsleepgrp {
- fsl,pins = <
- MX93_PAD_ENET2_MDC__GPIO4_IO14 0x51e
- MX93_PAD_ENET2_MDIO__GPIO4_IO15 0x51e
- MX93_PAD_ENET2_RD0__GPIO4_IO24 0x51e
- MX93_PAD_ENET2_RD1__GPIO4_IO25 0x51e
- MX93_PAD_ENET2_RD2__GPIO4_IO26 0x51e
- MX93_PAD_ENET2_RD3__GPIO4_IO27 0x51e
- MX93_PAD_ENET2_RXC__GPIO4_IO23 0x51e
- MX93_PAD_ENET2_RX_CTL__GPIO4_IO22 0x51e
- MX93_PAD_ENET2_TD0__GPIO4_IO19 0x51e
- MX93_PAD_ENET2_TD1__GPIO4_IO18 0x51e
- MX93_PAD_ENET2_TD2__GPIO4_IO17 0x51e
- MX93_PAD_ENET2_TD3__GPIO4_IO16 0x51e
- MX93_PAD_ENET2_TXC__GPIO4_IO21 0x51e
- MX93_PAD_ENET2_TX_CTL__GPIO4_IO20 0x51e
- >;
- };
-
- pinctrl_flexcan2: flexcan2grp {
- fsl,pins = <
- MX93_PAD_GPIO_IO25__CAN2_TX 0x139e
- MX93_PAD_GPIO_IO27__CAN2_RX 0x139e
- >;
- };
-
- pinctrl_flexcan2_sleep: flexcan2sleepgrp {
- fsl,pins = <
- MX93_PAD_GPIO_IO25__GPIO2_IO25 0x31e
- MX93_PAD_GPIO_IO27__GPIO2_IO27 0x31e
- >;
- };
-
- pinctrl_lpi2c1: lpi2c1grp {
- fsl,pins = <
- MX93_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e
- MX93_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e
- >;
- };
-
- pinctrl_lpi2c2: lpi2c2grp {
- fsl,pins = <
- MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e
- MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e
- >;
- };
-
- pinctrl_lpi2c3: lpi2c3grp {
- fsl,pins = <
- MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e
- MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e
- >;
- };
-
pinctrl_mqs1: mqs1grp {
fsl,pins = <
MX93_PAD_PDM_CLK__MQS1_LEFT 0x31e
@@ -610,149 +76,7 @@ MX93_PAD_PDM_BIT_STREAM0__MQS1_RIGHT 0x31e
>;
};
- pinctrl_pcal6524: pcal6524grp {
- fsl,pins = <
- MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e
- >;
- };
-
- pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
- fsl,pins = <
- MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e
- >;
- };
-
- pinctrl_uart1: uart1grp {
- fsl,pins = <
- MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
- MX93_PAD_UART1_TXD__LPUART1_TX 0x31e
- >;
- };
-
- pinctrl_uart5: uart5grp {
- fsl,pins = <
- MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX 0x31e
- MX93_PAD_DAP_TDI__LPUART5_RX 0x31e
- MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x31e
- MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B 0x31e
- >;
- };
-
- /* need to config the SION for data and cmd pad, refer to ERR052021 */
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins = <
- MX93_PAD_SD1_CLK__USDHC1_CLK 0x1582
- MX93_PAD_SD1_CMD__USDHC1_CMD 0x40001382
- MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x40001382
- MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x40001382
- MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x40001382
- MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x40001382
- MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x40001382
- MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x40001382
- MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x40001382
- MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x40001382
- MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x1582
- >;
- };
-
- /* need to config the SION for data and cmd pad, refer to ERR052021 */
- pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
- fsl,pins = <
- MX93_PAD_SD1_CLK__USDHC1_CLK 0x158e
- MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000138e
- MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e
- MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x4000138e
- MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x4000138e
- MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x4000138e
- MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x4000138e
- MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x4000138e
- MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x4000138e
- MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x4000138e
- MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x158e
- >;
- };
-
- /* need to config the SION for data and cmd pad, refer to ERR052021 */
- pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
- fsl,pins = <
- MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe
- MX93_PAD_SD1_CMD__USDHC1_CMD 0x400013fe
- MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x400013fe
- MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x400013fe
- MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013fe
- MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x400013fe
- MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x400013fe
- MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x400013fe
- MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x400013fe
- MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x400013fe
- MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe
- >;
- };
-
- pinctrl_usdhc2_gpio: usdhc2gpiogrp {
- fsl,pins = <
- MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
- >;
- };
-
- pinctrl_usdhc2_gpio_sleep: usdhc2gpiosleepgrp {
- fsl,pins = <
- MX93_PAD_SD2_CD_B__GPIO3_IO00 0x51e
- >;
- };
-
- /* need to config the SION for data and cmd pad, refer to ERR052021 */
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins = <
- MX93_PAD_SD2_CLK__USDHC2_CLK 0x1582
- MX93_PAD_SD2_CMD__USDHC2_CMD 0x40001382
- MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x40001382
- MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x40001382
- MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x40001382
- MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x40001382
- MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
- >;
- };
-
/* need to config the SION for data and cmd pad, refer to ERR052021 */
- pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
- fsl,pins = <
- MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e
- MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000138e
- MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e
- MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e
- MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e
- MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000138e
- MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
- >;
- };
-
- /* need to config the SION for data and cmd pad, refer to ERR052021 */
- pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
- fsl,pins = <
- MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe
- MX93_PAD_SD2_CMD__USDHC2_CMD 0x400013fe
- MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x400013fe
- MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x400013fe
- MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x400013fe
- MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe
- MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
- >;
- };
-
- pinctrl_usdhc2_sleep: usdhc2-sleepgrp {
- fsl,pins = <
- MX93_PAD_SD2_CLK__GPIO3_IO01 0x51e
- MX93_PAD_SD2_CMD__GPIO3_IO02 0x51e
- MX93_PAD_SD2_DATA0__GPIO3_IO03 0x51e
- MX93_PAD_SD2_DATA1__GPIO3_IO04 0x51e
- MX93_PAD_SD2_DATA2__GPIO3_IO05 0x51e
- MX93_PAD_SD2_DATA3__GPIO3_IO06 0x51e
- MX93_PAD_SD2_VSELECT__GPIO3_IO19 0x51e
- >;
- };
-
- /* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX93_PAD_SD3_CLK__USDHC3_CLK 0x1582
@@ -798,10 +122,4 @@ MX93_PAD_SD3_DATA2__GPIO3_IO24 0x31e
MX93_PAD_SD3_DATA3__GPIO3_IO25 0x31e
>;
};
-
- pinctrl_wdog: wdoggrp {
- fsl,pins = <
- MX93_PAD_WDOG_ANY__WDOG1_WDOG_ANY 0x31e
- >;
- };
};
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/3] dt-bindings: arm: fsl: Add i.MX93 Wireless FRDM board
2026-07-17 5:11 [PATCH 0/3] Add i.MX93 Wireless FRDM board support Joseph Guo
2026-07-17 5:11 ` [PATCH 1/3] arm64: dts: imx93-11x11-frdm: factor out common parts into dtsi Joseph Guo
@ 2026-07-17 5:11 ` Joseph Guo
2026-07-17 9:24 ` Krzysztof Kozlowski
2026-07-17 5:11 ` [PATCH 3/3] arm64: dts: imx93: Add i.MX93 Wireless FRDM board support Joseph Guo
2 siblings, 1 reply; 8+ messages in thread
From: Joseph Guo @ 2026-07-17 5:11 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, Joseph Guo
Add DT compatible string for NXP i.MX93 Wireless FRDM board.
i.MX93 Wireless SiP is created by integrating i.MX93 and IW610 WLCSP
(Wi-Fi + BLE + 802.15.4). And i.MX93 Wireless FRDM board with the i.MX93
Wireless SiP basically reuse the i.MX93 11x11 FRDM board, with some minor
functional and pin connection differences.
Signed-off-by: Joseph Guo <qijian.guo@nxp.com>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 7b57a6ee1b50dc22ece292d6d9b53b5aa834ee96..9ab7af8c02d68c7f95cccfb5071662eafc8f93a0 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -1513,6 +1513,7 @@ properties:
- fsl,imx93-11x11-frdm # i.MX93 11x11 FRDM Board
- fsl,imx93-14x14-evk # i.MX93 14x14 EVK Board
- fsl,imx93-wireless-evk # i.MX93 and IW610G WLCSP (Wi-Fi + BLE + 802.15.4) SiP EVK Board
+ - fsl,imx93-wireless-frdm # i.MX93 and IW610G WLCSP (Wi-Fi + BLE + 802.15.4) SiP FRDM Board
- const: fsl,imx93
- description: i.MX94 based Boards
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 3/3] arm64: dts: imx93: Add i.MX93 Wireless FRDM board support
2026-07-17 5:11 [PATCH 0/3] Add i.MX93 Wireless FRDM board support Joseph Guo
2026-07-17 5:11 ` [PATCH 1/3] arm64: dts: imx93-11x11-frdm: factor out common parts into dtsi Joseph Guo
2026-07-17 5:11 ` [PATCH 2/3] dt-bindings: arm: fsl: Add i.MX93 Wireless FRDM board Joseph Guo
@ 2026-07-17 5:11 ` Joseph Guo
2026-07-17 5:25 ` sashiko-bot
2 siblings, 1 reply; 8+ messages in thread
From: Joseph Guo @ 2026-07-17 5:11 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo
Cc: devicetree, imx, linux-arm-kernel, linux-kernel, Joseph Guo
i.MX93 Wireless FRDM board(FRDM-IMX93W) is a low-cost and compact board featuring
the i.MX93W applications processor:https://www.nxp.com/products/IMX93W
FRDM-IMX93W board basically reuse the FRDM-IMX93 board, with some minor
functional and pin connection differences. Reuse the
imx93-11x11-frdm-common.dtsi and add the board-specific changes.
Here are the detailed differences between FRDM-IMX93 and FRDM-IMX93W board.
Function differences:
Function FRDM-IMX93W FRDM-IMX93
WIFI/BT IW610 in i.MX93W IW612 M.2 module
MQS N Y
M.2 N Y
RPi 40-pin HDR Limited support(pin conflict) Y
Pin connection differences:
Function Signal name i.MX93W EVK i.MX93 EVK
WIFI/BT SPI_FRM SAI1_TXFS (spi1.PCS0) GPIO_IO08 (spi3.PCS0)
SPI_TXD SAI1_TXC (spi1.SIN) GPIO_IO09 (spi3.SIN)
SPI_RXD SAI1_RXD0 (spi1.SOUT) GPIO_IO10 (spi3.SOUT)
SPI_CLK SAI1_TXD0 (spi1.SCK) GPIO_IO11 (spi3.SCK)
SPI_INT CCM_CLKO1 on-board IO expander
NB_WAKE_IN PDM_CLK on-module IO expander
WL_WAKE_IN PDM_BIT_STREAM0 on-module IO expander
IND_RST_WL PDM_BIT_STREAM1 on-module IO expander
IND_RST_NB GPIO_IO28 on-module IO expander
PDn GPIO_IO29 on-module IO expander
NB_WAKE_OUT GPIO_IO14 on-board IO expander
WL_WAKE_OUT GPIO_IO15 CCM_CLKO1
I2C3 I2C3_SDA GPIO_IO00 GPIO_IO28
I2C3_SCL GPIO_IO01 GPIO_IO29
Signed-off-by: Joseph Guo <qijian.guo@nxp.com>
---
arch/arm64/boot/dts/freescale/Makefile | 1 +
arch/arm64/boot/dts/freescale/imx93w-frdm.dts | 23 +++++++++++++++++++++++
2 files changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index be3c858f1eeb1a807cb8ac36269c581143f755df..d48ba7dee1861e0b39ab025c4b8108ffa68c9bf3 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -655,6 +655,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla-mini-lvds-tm070jvhg33.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-var-dart-sonata.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-var-som-symphony.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93w-evk.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx93w-frdm.dtb
dtb-$(CONFIG_ARCH_MXC) += imx943-evk.dtb
imx943-evk-pcie0-ep-dtbs += imx943-evk.dtb imx-pcie0-ep.dtbo
diff --git a/arch/arm64/boot/dts/freescale/imx93w-frdm.dts b/arch/arm64/boot/dts/freescale/imx93w-frdm.dts
new file mode 100644
index 0000000000000000000000000000000000000000..766e942fe6638330b602577c541d93f3526afe51
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx93w-frdm.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 NXP
+ */
+
+/dts-v1/;
+
+#include "imx93w.dtsi"
+#include "imx93-11x11-frdm-common.dtsi"
+
+/ {
+ model = "NXP i.MX93W FRDM board";
+ compatible = "fsl,imx93-wireless-frdm", "fsl,imx93";
+};
+
+&iomuxc {
+ pinctrl_lpi2c3: lpi2c3grp {
+ fsl,pins = <
+ MX93_PAD_GPIO_IO00__LPI2C3_SDA 0x40000b9e
+ MX93_PAD_GPIO_IO01__LPI2C3_SCL 0x40000b9e
+ >;
+ };
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] arm64: dts: imx93-11x11-frdm: factor out common parts into dtsi
2026-07-17 5:11 ` [PATCH 1/3] arm64: dts: imx93-11x11-frdm: factor out common parts into dtsi Joseph Guo
@ 2026-07-17 5:19 ` sashiko-bot
2026-07-17 16:29 ` Frank Li
1 sibling, 0 replies; 8+ messages in thread
From: sashiko-bot @ 2026-07-17 5:19 UTC (permalink / raw)
To: Joseph Guo; +Cc: devicetree, conor+dt, imx, Frank.Li, robh
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Dangling phandle reference to a board-specific label in the common `.dtsi` file.
--
--- Patch [1]: [PATCH 1/3] arm64: dts: imx93-11x11-frdm: factor out common parts into dtsi ---
commit 75e389bfc1f27ac338bceffb58faf699a50fada0
Author: Joseph Guo <qijian.guo@nxp.com>
Subject: arm64: dts: imx93-11x11-frdm: factor out common parts into dtsi
This commit extracts common hardware definitions from imx93-11x11-frdm.dts
into a new imx93-11x11-frdm-common.dtsi file to allow sharing with the
wireless FRDM board.
> diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi
> new file mode 100644
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi
[ ... ]
> +&lpuart5 {
> + pinctrl-0 = <&pinctrl_uart5>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + uart-has-rtscts;
> +
> + bluetooth {
> + compatible = "nxp,88w8987-bt";
> + device-wakeup-gpios = <&pcal6408 3 GPIO_ACTIVE_HIGH>;
> + reset-gpios = <&pcal6524 19 GPIO_ACTIVE_LOW>;
> + vcc-supply = <®_usdhc3_vmmc>;
> + };
[Severity: Medium]
Will other boards that include this common .dtsi fail to compile?
The bluetooth node in the new common .dtsi references ®_usdhc3_vmmc, but
the definition for this regulator was left behind in the board-specific file.
> diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
> index bd14ba28690c0..f2a31a0eacabf 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
[ ... ]
> reg_usdhc3_vmmc: regulator-usdhc3 {
> compatible = "regulator-fixed";
> regulator-name = "VPCIe_3V3";
> @@ -76,51 +19,6 @@ reg_usdhc3_vmmc: regulator-usdhc3 {
> enable-active-high;
> };
Since the reg_usdhc3_vmmc label is not defined in the common .dtsi, any other
board attempting to include the common file will hit a missing label error
during compilation.
Should this regulator definition be moved to the common file alongside the
bluetooth node, or should the vcc-supply property be set as an override in
the board-specific files instead?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260717-imx93w_frdm-v1-0-0cca6c0ba2f5@nxp.com?part=1
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 3/3] arm64: dts: imx93: Add i.MX93 Wireless FRDM board support
2026-07-17 5:11 ` [PATCH 3/3] arm64: dts: imx93: Add i.MX93 Wireless FRDM board support Joseph Guo
@ 2026-07-17 5:25 ` sashiko-bot
0 siblings, 0 replies; 8+ messages in thread
From: sashiko-bot @ 2026-07-17 5:25 UTC (permalink / raw)
To: Joseph Guo; +Cc: conor+dt, robh, devicetree, Frank.Li, imx
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The i.MX93W FRDM device tree inherits an invalid Bluetooth configuration intended for an absent M.2 module, while omitting the correct configuration for the integrated IW610 chip.
--
--- Patch [3]: [PATCH 3/3] arm64: dts: imx93: Add i.MX93 Wireless FRDM board support ---
commit 54467df83181ba6647f33372016b6a5139213211
Author: Joseph Guo <qijian.guo@nxp.com>
arm64: dts: imx93: Add i.MX93 Wireless FRDM board support
This commit adds device tree support for the i.MX93 Wireless FRDM board.
It reuses the common FRDM device tree include but overrides specific pins
and configurations due to the hardware switch from an M.2 module to the
integrated IW610 chip.
> diff --git a/arch/arm64/boot/dts/freescale/imx93w-frdm.dts b/arch/arm64/boot/dts/freescale/imx93w-frdm.dts
> new file mode 100644
> index 0000000000000..766e942fe6638
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx93w-frdm.dts
> @@ -0,0 +1,23 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright 2026 NXP
> + */
> +
> +/dts-v1/;
> +
> +#include "imx93w.dtsi"
> +#include "imx93-11x11-frdm-common.dtsi"
[Severity: Medium]
Does this file need to explicitly disable the bluetooth node inherited from
the common dtsi file?
The imx93-11x11-frdm-common.dtsi unconditionally enables the M.2 bluetooth
node on lpuart5. Since the M.2 module is removed on the FRDM-IMX93W board,
will the kernel attempt to initialize a non-existent device and inadvertently
toggle I2C IO expander pins intended for the absent M.2 slot?
Should the lpuart5 bluetooth node be marked disabled here, and a new node
added for the correct IW610 Bluetooth interface mentioned in the commit
message?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260717-imx93w_frdm-v1-0-0cca6c0ba2f5@nxp.com?part=3
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/3] dt-bindings: arm: fsl: Add i.MX93 Wireless FRDM board
2026-07-17 5:11 ` [PATCH 2/3] dt-bindings: arm: fsl: Add i.MX93 Wireless FRDM board Joseph Guo
@ 2026-07-17 9:24 ` Krzysztof Kozlowski
0 siblings, 0 replies; 8+ messages in thread
From: Krzysztof Kozlowski @ 2026-07-17 9:24 UTC (permalink / raw)
To: Joseph Guo
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo,
devicetree, imx, linux-arm-kernel, linux-kernel
On Fri, Jul 17, 2026 at 02:11:53PM +0900, Joseph Guo wrote:
> Add DT compatible string for NXP i.MX93 Wireless FRDM board.
>
> i.MX93 Wireless SiP is created by integrating i.MX93 and IW610 WLCSP
> (Wi-Fi + BLE + 802.15.4). And i.MX93 Wireless FRDM board with the i.MX93
> Wireless SiP basically reuse the i.MX93 11x11 FRDM board, with some minor
> functional and pin connection differences.
>
> Signed-off-by: Joseph Guo <qijian.guo@nxp.com>
> ---
> Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
> 1 file changed, 1 insertion(+)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] arm64: dts: imx93-11x11-frdm: factor out common parts into dtsi
2026-07-17 5:11 ` [PATCH 1/3] arm64: dts: imx93-11x11-frdm: factor out common parts into dtsi Joseph Guo
2026-07-17 5:19 ` sashiko-bot
@ 2026-07-17 16:29 ` Frank Li
1 sibling, 0 replies; 8+ messages in thread
From: Frank Li @ 2026-07-17 16:29 UTC (permalink / raw)
To: Joseph Guo
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo,
devicetree, imx, linux-arm-kernel, linux-kernel
On Fri, Jul 17, 2026 at 02:11:52PM +0900, Joseph Guo wrote:
> [You don't often get email from qijian.guo@nxp.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> The i.MX93 Wireless FRDM board reuses most of the i.MX93 FRDM board.
> To avoid duplication and DTS-to-DTS includes, extract common hardware
> definitions from imx93-11x11-frdm.dts into imx93-11x11-frdm-common.dtsi
> to allow the common description shared by both boards.
>
> The FRDM-IMX93 board-specific .dts now includes the common dtsi and only
> contains board-specific overrides.
>
> Signed-off-by: Joseph Guo <qijian.guo@nxp.com>
> ---
> .../dts/freescale/imx93-11x11-frdm-common.dtsi | 692 +++++++++++++++++++++
> arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts | 686 +-------------------
> 2 files changed, 694 insertions(+), 684 deletions(-)
Please use -M -C to generate patch. git can auto detect copy.
Frank
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi
> new file mode 100644
> index 0000000000000000000000000000000000000000..69e23570f71f40a3f3517d31e16a9ca1d3dfb1f2
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm-common.dtsi
> @@ -0,0 +1,692 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +
> +#include <dt-bindings/usb/pd.h>
> +
> +/ {
> +
> + aliases {
> + can0 = &flexcan2;
> + ethernet0 = &fec;
> + ethernet1 = &eqos;
> + i2c0 = &lpi2c1;
> + i2c1 = &lpi2c2;
> + i2c2 = &lpi2c3;
> + mmc0 = &usdhc1; /* EMMC */
> + mmc1 = &usdhc2; /* uSD */
> + rtc0 = &pcf2131;
> + serial0 = &lpuart1;
> + serial4 = &lpuart5;
> + };
> +
> + chosen {
> + stdout-path = &lpuart1;
> + };
> +
> + flexcan2_phy: can-phy {
> + compatible = "nxp,tja1051";
> + #phy-cells = <0>;
> + max-bitrate = <5000000>;
> + silent-gpios = <&pcal6524 23 GPIO_ACTIVE_HIGH>;
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + button-k2 {
> + label = "Button K2";
> + linux,code = <BTN_1>;
> + gpios = <&pcal6524 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> + interrupt-parent = <&pcal6524>;
> + interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
> + };
> +
> + button-k3 {
> + label = "Button K3";
> + linux,code = <BTN_2>;
> + gpios = <&pcal6524 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> + interrupt-parent = <&pcal6524>;
> + interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
> + };
> + };
> +
> + reg_usdhc2_vmmc: regulator-usdhc2 {
> + compatible = "regulator-fixed";
> + off-on-delay-us = <12000>;
> + pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
> + pinctrl-names = "default";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "VSD_3V3";
> + vin-supply = <&buck4>;
> + gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +
> + reserved-memory {
> + ranges;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + linux,cma {
> + compatible = "shared-dma-pool";
> + alloc-ranges = <0 0x80000000 0 0x30000000>;
> + reusable;
> + size = <0 0x10000000>;
> + linux,cma-default;
> + };
> +
> + rsc_table: rsc-table@2021e000 {
> + reg = <0 0x2021e000 0 0x1000>;
> + no-map;
> + };
> +
> + vdev0vring0: vdev0vring0@a4000000 {
> + reg = <0 0xa4000000 0 0x8000>;
> + no-map;
> + };
> +
> + vdev0vring1: vdev0vring1@a4008000 {
> + reg = <0 0xa4008000 0 0x8000>;
> + no-map;
> + };
> +
> + vdev1vring0: vdev1vring0@a4010000 {
> + reg = <0 0xa4010000 0 0x8000>;
> + no-map;
> + };
> +
> + vdev1vring1: vdev1vring1@a4018000 {
> + reg = <0 0xa4018000 0 0x8000>;
> + no-map;
> + };
> +
> + vdevbuffer: vdevbuffer@a4020000 {
> + compatible = "shared-dma-pool";
> + reg = <0 0xa4020000 0 0x100000>;
> + no-map;
> + };
> + };
> +};
> +
> +&adc1 {
> + vref-supply = <&buck5>;
> + status = "okay";
> +};
> +
> +&mu1 {
> + status = "okay";
> +};
> +
> +&cm33 {
> + mboxes = <&mu1 0 1>,
> + <&mu1 1 1>,
> + <&mu1 3 1>;
> + mbox-names = "tx", "rx", "rxdb";
> + memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
> + <&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
> + status = "okay";
> +};
> +
> +&eqos {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&pinctrl_eqos>;
> + pinctrl-1 = <&pinctrl_eqos_sleep>;
> + phy-handle = <ðphy1>;
> + phy-mode = "rgmii-id";
> + status = "okay";
> +
> + mdio {
> + compatible = "snps,dwmac-mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clock-frequency = <5000000>;
> +
> + ethphy1: ethernet-phy@1 {
> + reg = <1>;
> + reset-assert-us = <10000>;
> + reset-deassert-us = <80000>;
> + reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>;
> + realtek,clkout-disable;
> + };
> + };
> +};
> +
> +&fec {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&pinctrl_fec>;
> + pinctrl-1 = <&pinctrl_fec_sleep>;
> + phy-mode = "rgmii-id";
> + phy-handle = <ðphy2>;
> + fsl,magic-packet;
> + status = "okay";
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clock-frequency = <5000000>;
> +
> + ethphy2: ethernet-phy@2 {
> + reg = <2>;
> + reset-assert-us = <10000>;
> + reset-deassert-us = <80000>;
> + reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>;
> + realtek,clkout-disable;
> + };
> + };
> +};
> +
> +&flexcan2 {
> + phys = <&flexcan2_phy>;
> + pinctrl-0 = <&pinctrl_flexcan2>;
> + pinctrl-1 = <&pinctrl_flexcan2_sleep>;
> + pinctrl-names = "default", "sleep";
> + status = "okay";
> +};
> +
> +&lpi2c1 {
> + clock-frequency = <400000>;
> + pinctrl-0 = <&pinctrl_lpi2c1>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + pcal6408: gpio@20 {
> + compatible = "nxp,pcal6408";
> + reg = <0x20>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + reset-gpios = <&pcal6524 20 GPIO_ACTIVE_LOW>;
> + };
> +};
> +
> +&lpi2c2 {
> + clock-frequency = <400000>;
> + pinctrl-0 = <&pinctrl_lpi2c2>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + pcal6524: gpio@22 {
> + compatible = "nxp,pcal6524";
> + reg = <0x22>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + interrupt-parent = <&gpio3>;
> + interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + pinctrl-0 = <&pinctrl_pcal6524>;
> + pinctrl-names = "default";
> + /* does not boot with supplier set, because it is the bucks interrupt parent */
> + /* vcc-supply = <&buck4>; */
> + };
> +
> + pmic@25 {
> + compatible = "nxp,pca9451a";
> + reg = <0x25>;
> + interrupt-parent = <&pcal6524>;
> + interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
> +
> + regulators {
> +
> + buck1: BUCK1 {
> + regulator-name = "VDD_SOC_0V8";
> + regulator-min-microvolt = <610000>;
> + regulator-max-microvolt = <950000>;
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-ramp-delay = <3125>;
> + };
> +
> + buck2: BUCK2 {
> + regulator-name = "LPD4_x_VDDQ_0V6";
> + regulator-min-microvolt = <600000>;
> + regulator-max-microvolt = <670000>;
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-ramp-delay = <3125>;
> + };
> +
> + buck4: BUCK4 {
> + regulator-name = "VDD_3V3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + buck5: BUCK5 {
> + regulator-name = "VDD_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + buck6: BUCK6 {
> + regulator-name = "LPD4_x_VDD2_1V1";
> + regulator-min-microvolt = <1060000>;
> + regulator-max-microvolt = <1140000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + ldo1: LDO1 {
> + regulator-name = "NVCC_BBSM_1V8";
> + regulator-min-microvolt = <1620000>;
> + regulator-max-microvolt = <1980000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + ldo4: LDO4 {
> + regulator-name = "VDD_ANA_0V8";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <840000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + ldo5: LDO5 {
> + regulator-name = "NVCC_SD";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> + };
> + };
> +
> + eeprom: eeprom@50 {
> + compatible = "atmel,24c256";
> + reg = <0x50>;
> + pagesize = <64>;
> + vcc-supply = <&buck4>;
> + };
> +};
> +
> +&lpi2c3 {
> + clock-frequency = <400000>;
> + pinctrl-0 = <&pinctrl_lpi2c3>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + ptn5110: tcpc@50 {
> + compatible = "nxp,ptn5110", "tcpci";
> + reg = <0x50>;
> + interrupt-parent = <&gpio3>;
> + interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
> +
> + typec1_con: connector {
> + compatible = "usb-c-connector";
> + data-role = "dual";
> + label = "USB-C";
> + op-sink-microwatt = <15000000>;
> + power-role = "dual";
> + self-powered;
> + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
> + PDO_VAR(5000, 20000, 3000)>;
> + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> + try-power-role = "sink";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + typec1_dr_sw: endpoint {
> + remote-endpoint = <&usb1_drd_sw>;
> + };
> + };
> + };
> + };
> + };
> +
> + pcf2131: rtc@53 {
> + compatible = "nxp,pcf2131";
> + reg = <0x53>;
> + interrupt-parent = <&pcal6524>;
> + interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
> + };
> +};
> +
> +&lpuart1 { /* console */
> + pinctrl-0 = <&pinctrl_uart1>;
> + pinctrl-names = "default";
> + status = "okay";
> +};
> +
> +&lpuart5 {
> + pinctrl-0 = <&pinctrl_uart5>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + uart-has-rtscts;
> +
> + bluetooth {
> + compatible = "nxp,88w8987-bt";
> + device-wakeup-gpios = <&pcal6408 3 GPIO_ACTIVE_HIGH>;
> + reset-gpios = <&pcal6524 19 GPIO_ACTIVE_LOW>;
> + vcc-supply = <®_usdhc3_vmmc>;
> + };
> +};
> +
> +&usbotg1 {
> + adp-disable;
> + disable-over-current;
> + dr_mode = "otg";
> + hnp-disable;
> + srp-disable;
> + usb-role-switch;
> + samsung,picophy-dc-vol-level-adjust = <7>;
> + samsung,picophy-pre-emp-curr-control = <3>;
> + status = "okay";
> +
> + port {
> + usb1_drd_sw: endpoint {
> + remote-endpoint = <&typec1_dr_sw>;
> + };
> + };
> +};
> +
> +&usbotg2 {
> + disable-over-current;
> + dr_mode = "host";
> + samsung,picophy-dc-vol-level-adjust = <7>;
> + samsung,picophy-pre-emp-curr-control = <3>;
> + status = "okay";
> +};
> +
> +&usdhc1 {
> + bus-width = <8>;
> + non-removable;
> + pinctrl-0 = <&pinctrl_usdhc1>;
> + pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + vmmc-supply = <&buck4>;
> + status = "okay";
> +};
> +
> +&usdhc2 {
> + bus-width = <4>;
> + cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
> + no-mmc;
> + no-sdio;
> + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
> + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
> + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
> + pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>;
> + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
> + vmmc-supply = <®_usdhc2_vmmc>;
> + status = "okay";
> +};
> +
> +&wdog3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_wdog>;
> + fsl,ext-reset-output;
> + status = "okay";
> +};
> +
> +&iomuxc {
> +
> + pinctrl_eqos: eqosgrp {
> + fsl,pins = <
> + MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x57e
> + MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e
> + MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e
> + MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e
> + MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e
> + MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e
> + MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x58e
> + MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e
> + MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e
> + MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x57e
> + MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e
> + MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e
> + MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x58e
> + MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e
> + >;
> + };
> +
> + pinctrl_eqos_sleep: eqossleepgrp {
> + fsl,pins = <
> + MX93_PAD_ENET1_MDC__GPIO4_IO00 0x31e
> + MX93_PAD_ENET1_MDIO__GPIO4_IO01 0x31e
> + MX93_PAD_ENET1_RD0__GPIO4_IO10 0x31e
> + MX93_PAD_ENET1_RD1__GPIO4_IO11 0x31e
> + MX93_PAD_ENET1_RD2__GPIO4_IO12 0x31e
> + MX93_PAD_ENET1_RD3__GPIO4_IO13 0x31e
> + MX93_PAD_ENET1_RXC__GPIO4_IO09 0x31e
> + MX93_PAD_ENET1_RX_CTL__GPIO4_IO08 0x31e
> + MX93_PAD_ENET1_TD0__GPIO4_IO05 0x31e
> + MX93_PAD_ENET1_TD1__GPIO4_IO04 0x31e
> + MX93_PAD_ENET1_TD2__GPIO4_IO03 0x31e
> + MX93_PAD_ENET1_TD3__GPIO4_IO02 0x31e
> + MX93_PAD_ENET1_TXC__GPIO4_IO07 0x31e
> + MX93_PAD_ENET1_TX_CTL__GPIO4_IO06 0x31e
> + >;
> + };
> +
> + pinctrl_fec: fecgrp {
> + fsl,pins = <
> + MX93_PAD_ENET2_MDC__ENET1_MDC 0x57e
> + MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x57e
> + MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e
> + MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e
> + MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e
> + MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e
> + MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x58e
> + MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
> + MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e
> + MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e
> + MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e
> + MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e
> + MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x58e
> + MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
> + >;
> + };
> +
> + pinctrl_fec_sleep: fecsleepgrp {
> + fsl,pins = <
> + MX93_PAD_ENET2_MDC__GPIO4_IO14 0x51e
> + MX93_PAD_ENET2_MDIO__GPIO4_IO15 0x51e
> + MX93_PAD_ENET2_RD0__GPIO4_IO24 0x51e
> + MX93_PAD_ENET2_RD1__GPIO4_IO25 0x51e
> + MX93_PAD_ENET2_RD2__GPIO4_IO26 0x51e
> + MX93_PAD_ENET2_RD3__GPIO4_IO27 0x51e
> + MX93_PAD_ENET2_RXC__GPIO4_IO23 0x51e
> + MX93_PAD_ENET2_RX_CTL__GPIO4_IO22 0x51e
> + MX93_PAD_ENET2_TD0__GPIO4_IO19 0x51e
> + MX93_PAD_ENET2_TD1__GPIO4_IO18 0x51e
> + MX93_PAD_ENET2_TD2__GPIO4_IO17 0x51e
> + MX93_PAD_ENET2_TD3__GPIO4_IO16 0x51e
> + MX93_PAD_ENET2_TXC__GPIO4_IO21 0x51e
> + MX93_PAD_ENET2_TX_CTL__GPIO4_IO20 0x51e
> + >;
> + };
> +
> + pinctrl_flexcan2: flexcan2grp {
> + fsl,pins = <
> + MX93_PAD_GPIO_IO25__CAN2_TX 0x139e
> + MX93_PAD_GPIO_IO27__CAN2_RX 0x139e
> + >;
> + };
> +
> + pinctrl_flexcan2_sleep: flexcan2sleepgrp {
> + fsl,pins = <
> + MX93_PAD_GPIO_IO25__GPIO2_IO25 0x31e
> + MX93_PAD_GPIO_IO27__GPIO2_IO27 0x31e
> + >;
> + };
> +
> + pinctrl_lpi2c1: lpi2c1grp {
> + fsl,pins = <
> + MX93_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e
> + MX93_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e
> + >;
> + };
> +
> + pinctrl_lpi2c2: lpi2c2grp {
> + fsl,pins = <
> + MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e
> + MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e
> + >;
> + };
> +
> + pinctrl_lpi2c3: lpi2c3grp {
> + fsl,pins = <
> + MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e
> + MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e
> + >;
> + };
> +
> + pinctrl_pcal6524: pcal6524grp {
> + fsl,pins = <
> + MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e
> + >;
> + };
> +
> + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
> + fsl,pins = <
> + MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e
> + >;
> + };
> +
> + pinctrl_uart1: uart1grp {
> + fsl,pins = <
> + MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
> + MX93_PAD_UART1_TXD__LPUART1_TX 0x31e
> + >;
> + };
> +
> + pinctrl_uart5: uart5grp {
> + fsl,pins = <
> + MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX 0x31e
> + MX93_PAD_DAP_TDI__LPUART5_RX 0x31e
> + MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x31e
> + MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B 0x31e
> + >;
> + };
> +
> + /* need to config the SION for data and cmd pad, refer to ERR052021 */
> + pinctrl_usdhc1: usdhc1grp {
> + fsl,pins = <
> + MX93_PAD_SD1_CLK__USDHC1_CLK 0x1582
> + MX93_PAD_SD1_CMD__USDHC1_CMD 0x40001382
> + MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x40001382
> + MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x40001382
> + MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x40001382
> + MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x40001382
> + MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x40001382
> + MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x40001382
> + MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x40001382
> + MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x40001382
> + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x1582
> + >;
> + };
> +
> + /* need to config the SION for data and cmd pad, refer to ERR052021 */
> + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
> + fsl,pins = <
> + MX93_PAD_SD1_CLK__USDHC1_CLK 0x158e
> + MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000138e
> + MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e
> + MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x4000138e
> + MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x4000138e
> + MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x4000138e
> + MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x4000138e
> + MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x4000138e
> + MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x4000138e
> + MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x4000138e
> + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x158e
> + >;
> + };
> +
> + /* need to config the SION for data and cmd pad, refer to ERR052021 */
> + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
> + fsl,pins = <
> + MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe
> + MX93_PAD_SD1_CMD__USDHC1_CMD 0x400013fe
> + MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x400013fe
> + MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x400013fe
> + MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013fe
> + MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x400013fe
> + MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x400013fe
> + MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x400013fe
> + MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x400013fe
> + MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x400013fe
> + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe
> + >;
> + };
> +
> + pinctrl_usdhc2_gpio: usdhc2gpiogrp {
> + fsl,pins = <
> + MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
> + >;
> + };
> +
> + pinctrl_usdhc2_gpio_sleep: usdhc2gpiosleepgrp {
> + fsl,pins = <
> + MX93_PAD_SD2_CD_B__GPIO3_IO00 0x51e
> + >;
> + };
> +
> + /* need to config the SION for data and cmd pad, refer to ERR052021 */
> + pinctrl_usdhc2: usdhc2grp {
> + fsl,pins = <
> + MX93_PAD_SD2_CLK__USDHC2_CLK 0x1582
> + MX93_PAD_SD2_CMD__USDHC2_CMD 0x40001382
> + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x40001382
> + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x40001382
> + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x40001382
> + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x40001382
> + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
> + >;
> + };
> +
> + /* need to config the SION for data and cmd pad, refer to ERR052021 */
> + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
> + fsl,pins = <
> + MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e
> + MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000138e
> + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e
> + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e
> + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e
> + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000138e
> + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
> + >;
> + };
> +
> + /* need to config the SION for data and cmd pad, refer to ERR052021 */
> + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
> + fsl,pins = <
> + MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe
> + MX93_PAD_SD2_CMD__USDHC2_CMD 0x400013fe
> + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x400013fe
> + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x400013fe
> + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x400013fe
> + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe
> + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
> + >;
> + };
> +
> + pinctrl_usdhc2_sleep: usdhc2-sleepgrp {
> + fsl,pins = <
> + MX93_PAD_SD2_CLK__GPIO3_IO01 0x51e
> + MX93_PAD_SD2_CMD__GPIO3_IO02 0x51e
> + MX93_PAD_SD2_DATA0__GPIO3_IO03 0x51e
> + MX93_PAD_SD2_DATA1__GPIO3_IO04 0x51e
> + MX93_PAD_SD2_DATA2__GPIO3_IO05 0x51e
> + MX93_PAD_SD2_DATA3__GPIO3_IO06 0x51e
> + MX93_PAD_SD2_VSELECT__GPIO3_IO19 0x51e
> + >;
> + };
> +
> + pinctrl_wdog: wdoggrp {
> + fsl,pins = <
> + MX93_PAD_WDOG_ANY__WDOG1_WDOG_ANY 0x31e
> + >;
> + };
> +};
> diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
> index bd14ba28690c081817111aaabef12fb56a7c56a4..f2a31a0eacabff07532aee989eebd75a0c3e22e0 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
> @@ -1,71 +1,14 @@
> // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +
> /dts-v1/;
>
> -#include <dt-bindings/usb/pd.h>
> #include "imx93.dtsi"
> +#include "imx93-11x11-frdm-common.dtsi"
>
> / {
> compatible = "fsl,imx93-11x11-frdm", "fsl,imx93";
> model = "NXP i.MX93 11X11 FRDM board";
>
> - aliases {
> - can0 = &flexcan2;
> - ethernet0 = &fec;
> - ethernet1 = &eqos;
> - i2c0 = &lpi2c1;
> - i2c1 = &lpi2c2;
> - i2c2 = &lpi2c3;
> - mmc0 = &usdhc1; /* EMMC */
> - mmc1 = &usdhc2; /* uSD */
> - rtc0 = &pcf2131;
> - serial0 = &lpuart1;
> - serial4 = &lpuart5;
> - };
> -
> - chosen {
> - stdout-path = &lpuart1;
> - };
> -
> - flexcan2_phy: can-phy {
> - compatible = "nxp,tja1051";
> - #phy-cells = <0>;
> - max-bitrate = <5000000>;
> - silent-gpios = <&pcal6524 23 GPIO_ACTIVE_HIGH>;
> - };
> -
> - gpio-keys {
> - compatible = "gpio-keys";
> -
> - button-k2 {
> - label = "Button K2";
> - linux,code = <BTN_1>;
> - gpios = <&pcal6524 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> - interrupt-parent = <&pcal6524>;
> - interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
> - };
> -
> - button-k3 {
> - label = "Button K3";
> - linux,code = <BTN_2>;
> - gpios = <&pcal6524 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> - interrupt-parent = <&pcal6524>;
> - interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
> - };
> - };
> -
> - reg_usdhc2_vmmc: regulator-usdhc2 {
> - compatible = "regulator-fixed";
> - off-on-delay-us = <12000>;
> - pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
> - pinctrl-names = "default";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> - regulator-name = "VSD_3V3";
> - vin-supply = <&buck4>;
> - gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
> - enable-active-high;
> - };
> -
> reg_usdhc3_vmmc: regulator-usdhc3 {
> compatible = "regulator-fixed";
> regulator-name = "VPCIe_3V3";
> @@ -76,51 +19,6 @@ reg_usdhc3_vmmc: regulator-usdhc3 {
> enable-active-high;
> };
>
> - reserved-memory {
> - ranges;
> - #address-cells = <2>;
> - #size-cells = <2>;
> -
> - linux,cma {
> - compatible = "shared-dma-pool";
> - alloc-ranges = <0 0x80000000 0 0x30000000>;
> - reusable;
> - size = <0 0x10000000>;
> - linux,cma-default;
> - };
> -
> - rsc_table: rsc-table@2021e000 {
> - reg = <0 0x2021e000 0 0x1000>;
> - no-map;
> - };
> -
> - vdev0vring0: vdev0vring0@a4000000 {
> - reg = <0 0xa4000000 0 0x8000>;
> - no-map;
> - };
> -
> - vdev0vring1: vdev0vring1@a4008000 {
> - reg = <0 0xa4008000 0 0x8000>;
> - no-map;
> - };
> -
> - vdev1vring0: vdev1vring0@a4010000 {
> - reg = <0 0xa4010000 0 0x8000>;
> - no-map;
> - };
> -
> - vdev1vring1: vdev1vring1@a4018000 {
> - reg = <0 0xa4018000 0 0x8000>;
> - no-map;
> - };
> -
> - vdevbuffer: vdevbuffer@a4020000 {
> - compatible = "shared-dma-pool";
> - reg = <0 0xa4020000 0 0x100000>;
> - no-map;
> - };
> - };
> -
> sound-mqs {
> compatible = "fsl,imx-audio-mqs";
> model = "mqs-audio";
> @@ -134,269 +32,6 @@ usdhc3_pwrseq: mmc-pwrseq {
> };
> };
>
> -&adc1 {
> - vref-supply = <&buck5>;
> - status = "okay";
> -};
> -
> -&mu1 {
> - status = "okay";
> -};
> -
> -&cm33 {
> - mboxes = <&mu1 0 1>,
> - <&mu1 1 1>,
> - <&mu1 3 1>;
> - mbox-names = "tx", "rx", "rxdb";
> - memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
> - <&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
> - status = "okay";
> -};
> -
> -&eqos {
> - pinctrl-names = "default", "sleep";
> - pinctrl-0 = <&pinctrl_eqos>;
> - pinctrl-1 = <&pinctrl_eqos_sleep>;
> - phy-handle = <ðphy1>;
> - phy-mode = "rgmii-id";
> - status = "okay";
> -
> - mdio {
> - compatible = "snps,dwmac-mdio";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - clock-frequency = <5000000>;
> -
> - ethphy1: ethernet-phy@1 {
> - reg = <1>;
> - reset-assert-us = <10000>;
> - reset-deassert-us = <80000>;
> - reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>;
> - realtek,clkout-disable;
> - };
> - };
> -};
> -
> -&fec {
> - pinctrl-names = "default", "sleep";
> - pinctrl-0 = <&pinctrl_fec>;
> - pinctrl-1 = <&pinctrl_fec_sleep>;
> - phy-mode = "rgmii-id";
> - phy-handle = <ðphy2>;
> - fsl,magic-packet;
> - status = "okay";
> -
> - mdio {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - clock-frequency = <5000000>;
> -
> - ethphy2: ethernet-phy@2 {
> - reg = <2>;
> - reset-assert-us = <10000>;
> - reset-deassert-us = <80000>;
> - reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>;
> - realtek,clkout-disable;
> - };
> - };
> -};
> -
> -&flexcan2 {
> - phys = <&flexcan2_phy>;
> - pinctrl-0 = <&pinctrl_flexcan2>;
> - pinctrl-1 = <&pinctrl_flexcan2_sleep>;
> - pinctrl-names = "default", "sleep";
> - status = "okay";
> -};
> -
> -&lpi2c1 {
> - clock-frequency = <400000>;
> - pinctrl-0 = <&pinctrl_lpi2c1>;
> - pinctrl-names = "default";
> - status = "okay";
> -
> - pcal6408: gpio@20 {
> - compatible = "nxp,pcal6408";
> - reg = <0x20>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - reset-gpios = <&pcal6524 20 GPIO_ACTIVE_LOW>;
> - };
> -};
> -
> -&lpi2c2 {
> - clock-frequency = <400000>;
> - pinctrl-0 = <&pinctrl_lpi2c2>;
> - pinctrl-names = "default";
> - status = "okay";
> -
> - pcal6524: gpio@22 {
> - compatible = "nxp,pcal6524";
> - reg = <0x22>;
> - #interrupt-cells = <2>;
> - interrupt-controller;
> - interrupt-parent = <&gpio3>;
> - interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - pinctrl-0 = <&pinctrl_pcal6524>;
> - pinctrl-names = "default";
> - /* does not boot with supplier set, because it is the bucks interrupt parent */
> - /* vcc-supply = <&buck4>; */
> - };
> -
> - pmic@25 {
> - compatible = "nxp,pca9451a";
> - reg = <0x25>;
> - interrupt-parent = <&pcal6524>;
> - interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
> -
> - regulators {
> -
> - buck1: BUCK1 {
> - regulator-name = "VDD_SOC_0V8";
> - regulator-min-microvolt = <610000>;
> - regulator-max-microvolt = <950000>;
> - regulator-always-on;
> - regulator-boot-on;
> - regulator-ramp-delay = <3125>;
> - };
> -
> - buck2: BUCK2 {
> - regulator-name = "LPD4_x_VDDQ_0V6";
> - regulator-min-microvolt = <600000>;
> - regulator-max-microvolt = <670000>;
> - regulator-always-on;
> - regulator-boot-on;
> - regulator-ramp-delay = <3125>;
> - };
> -
> - buck4: BUCK4 {
> - regulator-name = "VDD_3V3";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> - regulator-always-on;
> - regulator-boot-on;
> - };
> -
> - buck5: BUCK5 {
> - regulator-name = "VDD_1V8";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> - regulator-always-on;
> - regulator-boot-on;
> - };
> -
> - buck6: BUCK6 {
> - regulator-name = "LPD4_x_VDD2_1V1";
> - regulator-min-microvolt = <1060000>;
> - regulator-max-microvolt = <1140000>;
> - regulator-always-on;
> - regulator-boot-on;
> - };
> -
> - ldo1: LDO1 {
> - regulator-name = "NVCC_BBSM_1V8";
> - regulator-min-microvolt = <1620000>;
> - regulator-max-microvolt = <1980000>;
> - regulator-always-on;
> - regulator-boot-on;
> - };
> -
> - ldo4: LDO4 {
> - regulator-name = "VDD_ANA_0V8";
> - regulator-min-microvolt = <800000>;
> - regulator-max-microvolt = <840000>;
> - regulator-always-on;
> - regulator-boot-on;
> - };
> -
> - ldo5: LDO5 {
> - regulator-name = "NVCC_SD";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <3300000>;
> - regulator-always-on;
> - regulator-boot-on;
> - };
> - };
> - };
> -
> - eeprom: eeprom@50 {
> - compatible = "atmel,24c256";
> - reg = <0x50>;
> - pagesize = <64>;
> - vcc-supply = <&buck4>;
> - };
> -};
> -
> -&lpi2c3 {
> - clock-frequency = <400000>;
> - pinctrl-0 = <&pinctrl_lpi2c3>;
> - pinctrl-names = "default";
> - status = "okay";
> -
> - ptn5110: tcpc@50 {
> - compatible = "nxp,ptn5110", "tcpci";
> - reg = <0x50>;
> - interrupt-parent = <&gpio3>;
> - interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
> -
> - typec1_con: connector {
> - compatible = "usb-c-connector";
> - data-role = "dual";
> - label = "USB-C";
> - op-sink-microwatt = <15000000>;
> - power-role = "dual";
> - self-powered;
> - sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
> - PDO_VAR(5000, 20000, 3000)>;
> - source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> - try-power-role = "sink";
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> -
> - typec1_dr_sw: endpoint {
> - remote-endpoint = <&usb1_drd_sw>;
> - };
> - };
> - };
> - };
> - };
> -
> - pcf2131: rtc@53 {
> - compatible = "nxp,pcf2131";
> - reg = <0x53>;
> - interrupt-parent = <&pcal6524>;
> - interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
> - };
> -};
> -
> -&lpuart1 { /* console */
> - pinctrl-0 = <&pinctrl_uart1>;
> - pinctrl-names = "default";
> - status = "okay";
> -};
> -
> -&lpuart5 {
> - pinctrl-0 = <&pinctrl_uart5>;
> - pinctrl-names = "default";
> - status = "okay";
> -
> - uart-has-rtscts;
> -
> - bluetooth {
> - compatible = "nxp,88w8987-bt";
> - device-wakeup-gpios = <&pcal6408 3 GPIO_ACTIVE_HIGH>;
> - reset-gpios = <&pcal6524 19 GPIO_ACTIVE_LOW>;
> - vcc-supply = <®_usdhc3_vmmc>;
> - };
> -};
> -
> &mqs1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_mqs1>;
> @@ -418,57 +53,6 @@ &sai1 {
> status = "okay";
> };
>
> -&usbotg1 {
> - adp-disable;
> - disable-over-current;
> - dr_mode = "otg";
> - hnp-disable;
> - srp-disable;
> - usb-role-switch;
> - samsung,picophy-dc-vol-level-adjust = <7>;
> - samsung,picophy-pre-emp-curr-control = <3>;
> - status = "okay";
> -
> - port {
> - usb1_drd_sw: endpoint {
> - remote-endpoint = <&typec1_dr_sw>;
> - };
> - };
> -};
> -
> -&usbotg2 {
> - disable-over-current;
> - dr_mode = "host";
> - samsung,picophy-dc-vol-level-adjust = <7>;
> - samsung,picophy-pre-emp-curr-control = <3>;
> - status = "okay";
> -};
> -
> -&usdhc1 {
> - bus-width = <8>;
> - non-removable;
> - pinctrl-0 = <&pinctrl_usdhc1>;
> - pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
> - pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
> - pinctrl-names = "default", "state_100mhz", "state_200mhz";
> - vmmc-supply = <&buck4>;
> - status = "okay";
> -};
> -
> -&usdhc2 {
> - bus-width = <4>;
> - cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
> - no-mmc;
> - no-sdio;
> - pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
> - pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
> - pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
> - pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>;
> - pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
> - vmmc-supply = <®_usdhc2_vmmc>;
> - status = "okay";
> -};
> -
> &usdhc3 {
> bus-width = <4>;
> keep-power-in-suspend;
> @@ -483,126 +67,8 @@ &usdhc3 {
> status = "okay";
> };
>
> -&wdog3 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_wdog>;
> - fsl,ext-reset-output;
> - status = "okay";
> -};
>
> &iomuxc {
> -
> - pinctrl_eqos: eqosgrp {
> - fsl,pins = <
> - MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x57e
> - MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e
> - MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e
> - MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e
> - MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e
> - MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e
> - MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x58e
> - MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e
> - MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e
> - MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x57e
> - MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e
> - MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e
> - MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x58e
> - MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e
> - >;
> - };
> -
> - pinctrl_eqos_sleep: eqossleepgrp {
> - fsl,pins = <
> - MX93_PAD_ENET1_MDC__GPIO4_IO00 0x31e
> - MX93_PAD_ENET1_MDIO__GPIO4_IO01 0x31e
> - MX93_PAD_ENET1_RD0__GPIO4_IO10 0x31e
> - MX93_PAD_ENET1_RD1__GPIO4_IO11 0x31e
> - MX93_PAD_ENET1_RD2__GPIO4_IO12 0x31e
> - MX93_PAD_ENET1_RD3__GPIO4_IO13 0x31e
> - MX93_PAD_ENET1_RXC__GPIO4_IO09 0x31e
> - MX93_PAD_ENET1_RX_CTL__GPIO4_IO08 0x31e
> - MX93_PAD_ENET1_TD0__GPIO4_IO05 0x31e
> - MX93_PAD_ENET1_TD1__GPIO4_IO04 0x31e
> - MX93_PAD_ENET1_TD2__GPIO4_IO03 0x31e
> - MX93_PAD_ENET1_TD3__GPIO4_IO02 0x31e
> - MX93_PAD_ENET1_TXC__GPIO4_IO07 0x31e
> - MX93_PAD_ENET1_TX_CTL__GPIO4_IO06 0x31e
> - >;
> - };
> -
> - pinctrl_fec: fecgrp {
> - fsl,pins = <
> - MX93_PAD_ENET2_MDC__ENET1_MDC 0x57e
> - MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x57e
> - MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e
> - MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e
> - MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e
> - MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e
> - MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x58e
> - MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
> - MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e
> - MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e
> - MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e
> - MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e
> - MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x58e
> - MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
> - >;
> - };
> -
> - pinctrl_fec_sleep: fecsleepgrp {
> - fsl,pins = <
> - MX93_PAD_ENET2_MDC__GPIO4_IO14 0x51e
> - MX93_PAD_ENET2_MDIO__GPIO4_IO15 0x51e
> - MX93_PAD_ENET2_RD0__GPIO4_IO24 0x51e
> - MX93_PAD_ENET2_RD1__GPIO4_IO25 0x51e
> - MX93_PAD_ENET2_RD2__GPIO4_IO26 0x51e
> - MX93_PAD_ENET2_RD3__GPIO4_IO27 0x51e
> - MX93_PAD_ENET2_RXC__GPIO4_IO23 0x51e
> - MX93_PAD_ENET2_RX_CTL__GPIO4_IO22 0x51e
> - MX93_PAD_ENET2_TD0__GPIO4_IO19 0x51e
> - MX93_PAD_ENET2_TD1__GPIO4_IO18 0x51e
> - MX93_PAD_ENET2_TD2__GPIO4_IO17 0x51e
> - MX93_PAD_ENET2_TD3__GPIO4_IO16 0x51e
> - MX93_PAD_ENET2_TXC__GPIO4_IO21 0x51e
> - MX93_PAD_ENET2_TX_CTL__GPIO4_IO20 0x51e
> - >;
> - };
> -
> - pinctrl_flexcan2: flexcan2grp {
> - fsl,pins = <
> - MX93_PAD_GPIO_IO25__CAN2_TX 0x139e
> - MX93_PAD_GPIO_IO27__CAN2_RX 0x139e
> - >;
> - };
> -
> - pinctrl_flexcan2_sleep: flexcan2sleepgrp {
> - fsl,pins = <
> - MX93_PAD_GPIO_IO25__GPIO2_IO25 0x31e
> - MX93_PAD_GPIO_IO27__GPIO2_IO27 0x31e
> - >;
> - };
> -
> - pinctrl_lpi2c1: lpi2c1grp {
> - fsl,pins = <
> - MX93_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e
> - MX93_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e
> - >;
> - };
> -
> - pinctrl_lpi2c2: lpi2c2grp {
> - fsl,pins = <
> - MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e
> - MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e
> - >;
> - };
> -
> - pinctrl_lpi2c3: lpi2c3grp {
> - fsl,pins = <
> - MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e
> - MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e
> - >;
> - };
> -
> pinctrl_mqs1: mqs1grp {
> fsl,pins = <
> MX93_PAD_PDM_CLK__MQS1_LEFT 0x31e
> @@ -610,149 +76,7 @@ MX93_PAD_PDM_BIT_STREAM0__MQS1_RIGHT 0x31e
> >;
> };
>
> - pinctrl_pcal6524: pcal6524grp {
> - fsl,pins = <
> - MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e
> - >;
> - };
> -
> - pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
> - fsl,pins = <
> - MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e
> - >;
> - };
> -
> - pinctrl_uart1: uart1grp {
> - fsl,pins = <
> - MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
> - MX93_PAD_UART1_TXD__LPUART1_TX 0x31e
> - >;
> - };
> -
> - pinctrl_uart5: uart5grp {
> - fsl,pins = <
> - MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX 0x31e
> - MX93_PAD_DAP_TDI__LPUART5_RX 0x31e
> - MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x31e
> - MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B 0x31e
> - >;
> - };
> -
> - /* need to config the SION for data and cmd pad, refer to ERR052021 */
> - pinctrl_usdhc1: usdhc1grp {
> - fsl,pins = <
> - MX93_PAD_SD1_CLK__USDHC1_CLK 0x1582
> - MX93_PAD_SD1_CMD__USDHC1_CMD 0x40001382
> - MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x40001382
> - MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x40001382
> - MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x40001382
> - MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x40001382
> - MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x40001382
> - MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x40001382
> - MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x40001382
> - MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x40001382
> - MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x1582
> - >;
> - };
> -
> - /* need to config the SION for data and cmd pad, refer to ERR052021 */
> - pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
> - fsl,pins = <
> - MX93_PAD_SD1_CLK__USDHC1_CLK 0x158e
> - MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000138e
> - MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e
> - MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x4000138e
> - MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x4000138e
> - MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x4000138e
> - MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x4000138e
> - MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x4000138e
> - MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x4000138e
> - MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x4000138e
> - MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x158e
> - >;
> - };
> -
> - /* need to config the SION for data and cmd pad, refer to ERR052021 */
> - pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
> - fsl,pins = <
> - MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe
> - MX93_PAD_SD1_CMD__USDHC1_CMD 0x400013fe
> - MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x400013fe
> - MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x400013fe
> - MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x400013fe
> - MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x400013fe
> - MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x400013fe
> - MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x400013fe
> - MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x400013fe
> - MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x400013fe
> - MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe
> - >;
> - };
> -
> - pinctrl_usdhc2_gpio: usdhc2gpiogrp {
> - fsl,pins = <
> - MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
> - >;
> - };
> -
> - pinctrl_usdhc2_gpio_sleep: usdhc2gpiosleepgrp {
> - fsl,pins = <
> - MX93_PAD_SD2_CD_B__GPIO3_IO00 0x51e
> - >;
> - };
> -
> - /* need to config the SION for data and cmd pad, refer to ERR052021 */
> - pinctrl_usdhc2: usdhc2grp {
> - fsl,pins = <
> - MX93_PAD_SD2_CLK__USDHC2_CLK 0x1582
> - MX93_PAD_SD2_CMD__USDHC2_CMD 0x40001382
> - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x40001382
> - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x40001382
> - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x40001382
> - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x40001382
> - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
> - >;
> - };
> -
> /* need to config the SION for data and cmd pad, refer to ERR052021 */
> - pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
> - fsl,pins = <
> - MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e
> - MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000138e
> - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e
> - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e
> - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e
> - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000138e
> - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
> - >;
> - };
> -
> - /* need to config the SION for data and cmd pad, refer to ERR052021 */
> - pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
> - fsl,pins = <
> - MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe
> - MX93_PAD_SD2_CMD__USDHC2_CMD 0x400013fe
> - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x400013fe
> - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x400013fe
> - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x400013fe
> - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe
> - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
> - >;
> - };
> -
> - pinctrl_usdhc2_sleep: usdhc2-sleepgrp {
> - fsl,pins = <
> - MX93_PAD_SD2_CLK__GPIO3_IO01 0x51e
> - MX93_PAD_SD2_CMD__GPIO3_IO02 0x51e
> - MX93_PAD_SD2_DATA0__GPIO3_IO03 0x51e
> - MX93_PAD_SD2_DATA1__GPIO3_IO04 0x51e
> - MX93_PAD_SD2_DATA2__GPIO3_IO05 0x51e
> - MX93_PAD_SD2_DATA3__GPIO3_IO06 0x51e
> - MX93_PAD_SD2_VSELECT__GPIO3_IO19 0x51e
> - >;
> - };
> -
> - /* need to config the SION for data and cmd pad, refer to ERR052021 */
> pinctrl_usdhc3: usdhc3grp {
> fsl,pins = <
> MX93_PAD_SD3_CLK__USDHC3_CLK 0x1582
> @@ -798,10 +122,4 @@ MX93_PAD_SD3_DATA2__GPIO3_IO24 0x31e
> MX93_PAD_SD3_DATA3__GPIO3_IO25 0x31e
> >;
> };
> -
> - pinctrl_wdog: wdoggrp {
> - fsl,pins = <
> - MX93_PAD_WDOG_ANY__WDOG1_WDOG_ANY 0x31e
> - >;
> - };
> };
>
> --
> 2.34.1
>
>
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2026-07-17 16:29 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2026-07-17 5:11 [PATCH 0/3] Add i.MX93 Wireless FRDM board support Joseph Guo
2026-07-17 5:11 ` [PATCH 1/3] arm64: dts: imx93-11x11-frdm: factor out common parts into dtsi Joseph Guo
2026-07-17 5:19 ` sashiko-bot
2026-07-17 16:29 ` Frank Li
2026-07-17 5:11 ` [PATCH 2/3] dt-bindings: arm: fsl: Add i.MX93 Wireless FRDM board Joseph Guo
2026-07-17 9:24 ` Krzysztof Kozlowski
2026-07-17 5:11 ` [PATCH 3/3] arm64: dts: imx93: Add i.MX93 Wireless FRDM board support Joseph Guo
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