From: sashiko-bot@kernel.org
To: "Jared Kangas" <jkangas@redhat.com>
Cc: robh@kernel.org, devicetree@vger.kernel.org, Frank.Li@kernel.org,
imx@lists.linux.dev, conor+dt@kernel.org
Subject: Re: [PATCH v7] arm64: dts: s32g: Add GPR syscon region
Date: Fri, 17 Jul 2026 20:48:33 +0000 [thread overview]
Message-ID: <20260717204833.C7A3B1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260717-upstream-s32g-gpr-syscon-v7-1-ee198f287682@redhat.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The newly added `gpr: syscon@4007c000` node is inserted out of numerical address order in the device tree.
--
--- Patch [1]: [PATCH v7] arm64: dts: s32g: Add GPR syscon region ---
commit 1ee5b4988128c1ccf8969bc9b1f12c66a53c7919
Author: Dan Carpenter <error27@gmail.com>
arm64: dts: s32g: Add GPR syscon region
This commit adds the GPR syscon region for the s32 chipset. It resizes the
GPR syscon from 0x3000 to 0x100 to avoid a panic when reading the debugfs
regmap's registers file. The changes update the device tree files for both
s32g2 and s32g3.
> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> index 809019ea0e299..81280ec6b07a9 100644
> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> @@ -325,6 +325,11 @@ usdhc0-200mhz-grp4 {
> };
> };
>
> + gpr: syscon@4007c000 {
> + compatible = "nxp,s32g2-gpr", "syscon";
> + reg = <0x4007c000 0x100>;
> + };
[Severity: Low]
This isn't a bug, but should the gpr: syscon@4007c000 node be inserted in
numerical address order? It appears to be placed after the pinctrl@4009c240
node (which contains usdhc0-200mhz-grp4). To maintain standard numerical
sorting, it would typically be positioned before pinctrl@4009c240.
> +
> ocotp: nvmem@400a4000 {
[ ... ]
> diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
> index 22e80fc03f9c7..da35083a5e0e5 100644
> --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
> @@ -383,6 +383,11 @@ usdhc0-200mhz-grp4 {
> };
> };
>
> + gpr: syscon@4007c000 {
> + compatible = "nxp,s32g3-gpr", "syscon";
> + reg = <0x4007c000 0x100>;
> + };
[Severity: Low]
This isn't a bug, but similarly to the s32g2.dtsi changes, does this node
also break numerical address sorting? It seems to follow a node with a higher
address.
> +
> ocotp: nvmem@400a4000 {
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260717-upstream-s32g-gpr-syscon-v7-1-ee198f287682@redhat.com?part=1
next prev parent reply other threads:[~2026-07-17 20:48 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-17 20:33 [PATCH v7] arm64: dts: s32g: Add GPR syscon region Jared Kangas
2026-07-17 20:48 ` sashiko-bot [this message]
2026-07-17 20:51 ` Krzysztof Kozlowski
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