From: sashiko-bot@kernel.org
To: "Aaron Kling" <webgeek1234@gmail.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: soc: tegra: pmc: Document Tegra210B01
Date: Sat, 18 Jul 2026 00:23:44 +0000 [thread overview]
Message-ID: <20260718002344.836221F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260717-t210b01-pmc-v1-1-bf776be8b3a7@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The schema binds `nvidia,tegra210b01-pmc` to the exact same pinmux pad constraints as `nvidia,tegra210-pmc`, despite the commit message explicitly stating there are pad differences. Furthermore, the human-readable description tables were not updated to reflect these hardware differences.
--
--- Patch [1]: [PATCH 1/2] dt-bindings: soc: tegra: pmc: Document Tegra210B01 ---
commit 4180e7276638ec7a0b3917f5607e6419625d20cc
Author: Aaron Kling <webgeek1234@gmail.com>
dt-bindings: soc: tegra: pmc: Document Tegra210B01
The PMC in Tegra210B01 is very similar to the one in the original
Tegra210, but has a few powergate and pad differences. Document this
soc.
> diff --git a/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-pmc.yaml b/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-pmc.yaml
> index f516960dbbefb..8ec36c49f9594 100644
> --- a/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-pmc.yaml
> +++ b/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-pmc.yaml
[ ... ]
> @@ -346,7 +347,9 @@ allOf:
> properties:
> compatible:
> contains:
> - const: nvidia,tegra210-pmc
> + enum:
> + - nvidia,tegra210-pmc
> + - nvidia,tegra210b01-pmc
> then:
> properties:
> pinmux:
[Severity: Medium]
The commit message states that the Tegra210B01 PMC has a few "powergate
and pad differences" from the original Tegra210. However, this groups the
Tegra210B01 variant into the exact same conditional block as Tegra210 for
pinmux validation.
Could this regression cause the schema to incorrectly enforce identical
constraints instead of modeling the pad differences?
Should the human-readable description tables for powergates and pinmux also
be updated in this binding to reflect the new Tegra210B01 hardware differences?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260717-t210b01-pmc-v1-0-bf776be8b3a7@gmail.com?part=1
next prev parent reply other threads:[~2026-07-18 0:23 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-18 0:17 [PATCH 0/2] soc/tegra: pmc: Add Tegra210B01 support Aaron Kling via B4 Relay
2026-07-18 0:17 ` [PATCH 1/2] dt-bindings: soc: tegra: pmc: Document Tegra210B01 Aaron Kling via B4 Relay
2026-07-18 0:23 ` sashiko-bot [this message]
2026-07-18 0:17 ` [PATCH 2/2] soc/tegra: pmc: Add Tegra210B01 support Aaron Kling via B4 Relay
2026-07-18 0:29 ` sashiko-bot
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