[PATCH 0/2] Enable ICE for UFS on Hamoa IoT EVK

[PATCH 0/2] Enable ICE for UFS on Hamoa IoT EVK

[Wenjia Zhang]

This series enables the Inline Crypto Engine (ICE) hardware for UFS
storage on the Qualcomm X1E80100 (Hamoa IoT EVK) platform.

The ICE hardware provides AES-256-XTS inline encryption/decryption for
UFS storage, offloading cryptographic operations from the CPU. The
hardware version on this platform is ICE v4.0.1 with HWKM v2 support.

Validation:
- Probe successfully
- Standard key work well

Patch 1 adds the new compatible string to the DT binding documentation.
Patch 2 adds the ICE device node to the Hamoa DTSI.

Signed-off-by: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com>
---
Wenjia Zhang (2):
      dt-bindings: crypto: qcom,inline-crypto-engine: Add x1e80100 support
      arm64: dts: qcom: hamoa: Add ICE node for UFS inline encryption

 .../bindings/crypto/qcom,inline-crypto-engine.yaml          |  1 +
 arch/arm64/boot/dts/qcom/hamoa.dtsi                         | 13 +++++++++++++
 2 files changed, 14 insertions(+)
---
base-commit: 49362394dad7df66c274c867a271394c10ca2bb8
change-id: 20260714-devtool-5093900ac51a
prerequisite-change-id: 20260701-b4-shikra_crypto_changse-f2d6d5bf04b5:v4
prerequisite-patch-id: d5bc84db11dfa16371755109d32bafa6325a7706
prerequisite-patch-id: f653bca04deb0f4fe7d51b3064644c8e6b0d9c99
prerequisite-patch-id: 615f80abf57c155bbc190c1a70fe615a783755cf
prerequisite-patch-id: 59d8102674ce98be1a0e9b4d7939ffd8a7289ab1
prerequisite-patch-id: 691ec3b8a386d2c5b991a4311236f7f06adfc5b1
prerequisite-patch-id: 5b949e801e9bf4b5593a1f7cb8f02709eb3e869a

Best regards,
-- 
Wenjia Zhang <wenjia.zhang@oss.qualcomm.com>

[PATCH 1/2] dt-bindings: crypto: qcom,inline-crypto-engine: Add x1e80100 support

[Wenjia Zhang]

Add the compatible string for the Qualcomm X1E80100 SoC,
which is used on the Hamoa IoT EVK board.

Signed-off-by: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com>
---
 Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
index 92c3ba6eae13dbd8a6a448057e942a08cc3a3ea7..07d6778a287631262282d75c0d233919f4241edd 100644
--- a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
@@ -25,6 +25,7 @@ properties:
           - qcom,sm8550-inline-crypto-engine
           - qcom,sm8650-inline-crypto-engine
           - qcom,sm8750-inline-crypto-engine
+          - qcom,x1e80100-inline-crypto-engine
       - const: qcom,inline-crypto-engine
 
   reg:

-- 
2.43.0

Re: [PATCH 1/2] dt-bindings: crypto: qcom,inline-crypto-engine: Add x1e80100 support

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The `qcom,x1e80100-inline-crypto-engine` compatible string was omitted from the `allOf` conditional block that enforces required properties (`power-domains` and `clock-names`).
--

--- Patch [1]: [PATCH 1/2] dt-bindings: crypto: qcom,inline-crypto-engine: Add x1e80100 support ---
commit cfe29b614f97bbb01610fe15e88b3fd50c7177bb
Author: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com>

dt-bindings: crypto: qcom,inline-crypto-engine: Add x1e80100 support
    
Add the compatible string for the Qualcomm X1E80100 SoC,
which is used on the Hamoa IoT EVK board.

> diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
> index db895c50e2d25..29c9a1ff638c5 100644
> --- a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
> +++ b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
> @@ -25,6 +25,7 @@ properties:
>            - qcom,sm8550-inline-crypto-engine
>            - qcom,sm8650-inline-crypto-engine
>            - qcom,sm8750-inline-crypto-engine
> +          - qcom,x1e80100-inline-crypto-engine

[Severity: Medium]
Does this cause a regression in schema validation by omitting the new
compatible string from the conditional block?

Looking further down in qcom,inline-crypto-engine.yaml, there is an allOf
block that enforces power-domains and clock-names:

Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml:allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,eliza-inline-crypto-engine
              - qcom,milos-inline-crypto-engine

    then:
      required:
        - power-domains
        - clock-names

Omitting the new qcom,x1e80100-inline-crypto-engine compatible string from
this block allows incomplete device tree nodes missing power domains or
interface clocks to pass schema validation.

Could we add the new compatible string to this enum if it shares the same
hardware constraints?

>        - const: qcom,inline-crypto-engine
>  
>    reg:

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260721-devtool-v1-0-ade633accb41@oss.qualcomm.com?part=1

[PATCH 2/2] arm64: dts: qcom: hamoa: Add ICE node for UFS inline encryption

[Wenjia Zhang]

Add the Inline Crypto Engine (ICE) device node to enable hardware-
accelerated inline encryption for UFS storage on the Hamoa IoT EVK
board (Qualcomm X1E80100 SoC).

Signed-off-by: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/hamoa.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
index 0840eb2f884f98d76442fac7888ed49a07780898..0c9b459055d720a528a319272161d1d7446daefd 100644
--- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
@@ -4176,6 +4176,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
 			phys = <&ufs_mem_phy>;
 			phy-names = "ufsphy";
 
+			qcom,ice = <&ice>;
+
 			#reset-cells = <1>;
 
 			status = "disabled";
@@ -4221,6 +4223,17 @@ opp-300000000 {
 			};
 		};
 
+		ice: crypto@1d88000 {
+			compatible = "qcom,x1e80100-inline-crypto-engine",
+				     "qcom,inline-crypto-engine";
+			reg = <0x0 0x01d88000 0x0 0x18000>;
+			clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
+				 <&gcc GCC_UFS_PHY_AHB_CLK>;
+			clock-names = "core",
+				      "iface";
+			power-domains = <&gcc GCC_UFS_PHY_GDSC>;
+		};
+
 		cryptobam: dma-controller@1dc4000 {
 			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
 			reg = <0x0 0x01dc4000 0x0 0x28000>;

-- 
2.43.0

Re: [PATCH 2/2] arm64: dts: qcom: hamoa: Add ICE node for UFS inline encryption

[Harshal Dev]

Hi Wenjia,

On 21-07-2026 02:52 pm, Wenjia Zhang wrote:
> Add the Inline Crypto Engine (ICE) device node to enable hardware-

Nit: We're not 'enabling' but 'describing' hardware that is present on the SoC.
I suggest we re-phrase the wording to reflect that.

Regards,
Harshal
> accelerated inline encryption for UFS storage on the Hamoa IoT EVK
> board (Qualcomm X1E80100 SoC).
> 
> Signed-off-by: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/hamoa.dtsi | 13 +++++++++++++
>  1 file changed, 13 insertions(+)