[PATCH v4 0/4] Add DT Support for USB on Shikra

[PATCH v4 0/4] Add DT Support for USB on Shikra

[Krishna Kurapati]

Shikra has two USB controllers. Adding both USB controllers support
in device mode in this series.

Changes in v4:
- Enable both controllers in CQS/CQM platform
- Fixed iface clock in usb_2 node
- Skipped adding RB tags obtained from Konrad since on CQM/CQS, second
  controller also is enabled in v4. Also specified dr_mode as peripheral
  for first controller.

Link to v3:
https://lore.kernel.org/all/20260716-shikra-usb-dt-v3-v3-0-13f73a0571bb@oss.qualcomm.com/

Changes in v3:
- USB changes were sent as part of consolidated submission in v2, but
  they were later dropped since bindings had to be updated.
- Remove double vote on USB3_PRIM_CLKREF and also removed xo clock.
- Uses &mpm as interrupt reference (sashiko bot)

Link to v2:
https://lore.kernel.org/all/20260519-shikra-dt-v2-0-c01b90fb4395@oss.qualcomm.com/

Changes in v2:
- Moved to using mpm interrupt handler for ss phy irq (sashiko bot)

Link to v1:
https://lore.kernel.org/all/20260512-shikra-dt-v1-0-716438330dd0@oss.qualcomm.com/

Binding dependencies:
- USB controller: https://lore.kernel.org/all/20260711-usb-shikra-v4-v4-1-9d59b9d9aff7@oss.qualcomm.com/ - (RB'd)
- QUSB2 Phy: https://lore.kernel.org/all/20260712-usb-shikra-phy-v6-v6-1-1b3e51bf1541@oss.qualcomm.com/ - (RB'd)
- QMP Phy: https://lore.kernel.org/all/20260712-usb-shikra-phy-v6-v6-2-1b3e51bf1541@oss.qualcomm.com/ - (RB'd)

Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
---
Krishna Kurapati (4):
      arm64: dts: qcom: Add support for usb nodes on Shikra
      arm64: dts: qcom: Enable USB controllers on Shikra CQS platform
      arm64: dts: qcom: Enable USB controllers on Shikra CQM platform
      arm64: dts: qcom: Enable USB controllers on Shikra IQS platform

 arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts |  35 +++++
 arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts |  35 +++++
 arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts |  35 +++++
 arch/arm64/boot/dts/qcom/shikra.dtsi        | 221 ++++++++++++++++++++++++++++
 4 files changed, 326 insertions(+)
---
base-commit: 7b3363bc5e08c0a7f64b5a822a9b6e2fbcfcc401
change-id: 20260719-usb-shikra-dt-v4-d2b083472aee

Best regards,
--  
Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>

[PATCH v4 1/4] arm64: dts: qcom: Add support for usb nodes on Shikra

[Krishna Kurapati]

Add support for both USB controllers and their respective phys on Shikra.

Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/shikra.dtsi | 221 +++++++++++++++++++++++++++++++++++
 1 file changed, 221 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi
index 4e5bc9e17c8e..7f5d584fc17b 100644
--- a/arch/arm64/boot/dts/qcom/shikra.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
 #include <dt-bindings/interconnect/qcom,shikra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/phy/phy-qcom-qmp.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 
 / {
@@ -442,6 +443,85 @@ gcc: clock-controller@1400000 {
 			#power-domain-cells = <1>;
 		};
 
+		usb_1_hsphy: phy@1613000 {
+			compatible = "qcom,shikra-qusb2-phy";
+			reg = <0x0 0x01613000 0x0 0x180>;
+
+			clocks = <&gcc GCC_AHB2PHY_USB_CLK>,
+				 <&rpmcc RPM_SMD_XO_CLK_SRC>;
+			clock-names = "cfg_ahb", "ref";
+
+			resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
+			nvmem-cells = <&qusb2_hstx_trim_1>;
+			#phy-cells = <0>;
+
+			status = "disabled";
+		};
+
+		usb_2_hsphy: phy@1617000 {
+			compatible = "qcom,shikra-qusb2-phy";
+			reg = <0x0 0x01617000 0x0 0x180>;
+
+			clocks = <&gcc GCC_AHB2PHY_USB_CLK>,
+				 <&rpmcc RPM_SMD_XO_CLK_SRC>;
+			clock-names = "cfg_ahb", "ref";
+
+			resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
+			nvmem-cells = <&qusb2_hstx_trim_2>;
+			#phy-cells = <0>;
+
+			status = "disabled";
+		};
+
+		usb_qmpphy: phy@1615000 {
+			compatible = "qcom,shikra-qmp-usb3-dp-phy";
+			reg = <0x0 0x01615000 0x0 0x2000>;
+
+			clocks = <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
+				 <&gcc GCC_USB3_PRIM_CLKREF_EN>,
+				 <&gcc GCC_AHB2PHY_USB_CLK>,
+				 <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
+			clock-names = "aux",
+				      "ref",
+				      "cfg_ahb",
+				      "pipe";
+
+			resets = <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>,
+				 <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
+				 <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>;
+			reset-names = "phy_phy",
+				      "dp_phy",
+				      "phy";
+
+			#clock-cells = <1>;
+			#phy-cells = <1>;
+			orientation-switch;
+
+			qcom,tcsr-reg = <&tcsr_regs 0xb244 0xb248>;
+
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+
+					usb_qmpphy_out: endpoint {
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+
+					usb_qmpphy_usb_ss_in: endpoint {
+						remote-endpoint = <&usb_1_dwc3_ss>;
+					};
+				};
+			};
+		};
+
 		system_noc: interconnect@1880000 {
 			compatible = "qcom,shikra-sys-noc";
 			reg = <0x0 0x01880000 0x0 0x6a080>;
@@ -493,6 +573,11 @@ qusb2_hstx_trim_1: hstx-trim@25b {
 				bits = <1 4>;
 			};
 
+			qusb2_hstx_trim_2: hstx-trim@25a {
+				reg = <0x25a 0x1>;
+				bits = <4 4>;
+			};
+
 			gpu_speed_bin: gpu-speed-bin@2006 {
 				reg = <0x2006 0x2>;
 				bits = <5 8>;
@@ -640,6 +725,142 @@ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
 			};
 		};
 
+		usb_2: usb@4c00000 {
+			compatible = "qcom,shikra-dwc3", "qcom,snps-dwc3";
+			reg = <0x0 0x04c00000 0x0 0xfc100>;
+
+			clocks = <&gcc GCC_CFG_NOC_USB2_PRIM_AXI_CLK>,
+				 <&gcc GCC_USB20_MASTER_CLK>,
+				 <&gcc GCC_SYS_NOC_USB2_PRIM_AXI_CLK>,
+				 <&gcc GCC_USB20_SLEEP_CLK>,
+				 <&gcc GCC_USB20_MOCK_UTMI_CLK>;
+			clock-names = "cfg_noc",
+				      "core",
+				      "iface",
+				      "sleep",
+				      "mock_utmi";
+
+			assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
+					  <&gcc GCC_USB20_MASTER_CLK>;
+			assigned-clock-rates = <19200000>, <133333333>;
+
+			interrupts-extended = <&intc GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH 0>,
+					      <&intc GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH 0>,
+					      <&intc GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH 0>,
+					      <&mpm 59 IRQ_TYPE_LEVEL_HIGH>,
+					      <&mpm 58 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "dwc_usb3",
+					  "pwr_event",
+					  "hs_phy_irq",
+					  "dp_hs_phy_irq",
+					  "dm_hs_phy_irq";
+
+			iommus = <&apps_smmu 0x140 0x0>;
+
+			maximum-speed = "high-speed";
+
+			phys = <&usb_2_hsphy>;
+			phy-names = "usb2-phy";
+
+			power-domains = <&gcc GCC_USB20_GDSC>;
+
+			qcom,select-utmi-as-pipe-clk;
+			resets = <&gcc GCC_USB20_BCR>;
+
+			snps,dis_u2_susphy_quirk;
+			snps,dis_enblslpm_quirk;
+			snps,has-lpm-erratum;
+			snps,hird-threshold = /bits/ 8 <0x10>;
+
+			usb-role-switch;
+			wakeup-source;
+
+			status = "disabled";
+
+			port {
+				usb_2_dwc3_hs: endpoint {
+				};
+			};
+		};
+
+		usb_1: usb@4e00000 {
+			compatible = "qcom,shikra-dwc3", "qcom,snps-dwc3";
+			reg = <0x0 0x04e00000 0x0 0xfc100>;
+
+			clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
+				 <&gcc GCC_USB30_PRIM_MASTER_CLK>,
+				 <&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>,
+				 <&gcc GCC_USB30_PRIM_SLEEP_CLK>,
+				 <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
+			clock-names = "cfg_noc",
+				      "core",
+				      "iface",
+				      "sleep",
+				      "mock_utmi";
+
+			assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
+					  <&gcc GCC_USB30_PRIM_MASTER_CLK>;
+			assigned-clock-rates = <19200000>, <133333333>;
+
+			interrupts-extended = <&intc GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH 0>,
+					      <&intc GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH 0>,
+					      <&intc GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH 0>,
+					      <&mpm 91 IRQ_TYPE_LEVEL_HIGH>,
+					      <&mpm 90 IRQ_TYPE_LEVEL_HIGH>,
+					      <&mpm 12 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "dwc_usb3",
+					  "pwr_event",
+					  "hs_phy_irq",
+					  "dp_hs_phy_irq",
+					  "dm_hs_phy_irq",
+					  "ss_phy_irq";
+
+			iommus = <&apps_smmu 0x120 0x0>;
+
+			phys = <&usb_1_hsphy>, <&usb_qmpphy QMP_USB43DP_USB3_PHY>;
+			phy-names = "usb2-phy", "usb3-phy";
+
+			power-domains = <&gcc GCC_USB30_PRIM_GDSC>;
+
+			resets = <&gcc GCC_USB30_PRIM_BCR>;
+
+			snps,dis-u1-entry-quirk;
+			snps,dis-u2-entry-quirk;
+			snps,dis_u2_susphy_quirk;
+			snps,dis_u3_susphy_quirk;
+			snps,dis_enblslpm_quirk;
+			snps,has-lpm-erratum;
+			snps,hird-threshold = /bits/ 8 <0x10>;
+			snps,usb3_lpm_capable;
+			snps,parkmode-disable-ss-quirk;
+
+			usb-role-switch;
+
+			wakeup-source;
+
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+
+					usb_1_dwc3_hs: endpoint {
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+
+					usb_1_dwc3_ss: endpoint {
+						remote-endpoint = <&usb_qmpphy_usb_ss_in>;
+					};
+				};
+			};
+		};
+
 		sram@c11e000 {
 			compatible = "qcom,shikra-imem", "mmio-sram";
 			reg = <0x0 0x0c11e000 0x0 0x1000>;

-- 
2.34.1

[PATCH v4 2/4] arm64: dts: qcom: Enable USB controllers on Shikra CQS platform

[Krishna Kurapati]

Enable both USB controllers in device mode on Shikra CQS platform.

Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts | 35 +++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
index b3f19a64d7ae..006e24a62f5c 100644
--- a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
+++ b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
@@ -38,3 +38,38 @@ &sdhc_1 {
 
 	status = "okay";
 };
+
+&usb_1 {
+	dr_mode = "peripheral";
+
+	status = "okay";
+};
+
+&usb_1_hsphy {
+	vdd-supply = <&pm4125_l12>;
+	vdda-pll-supply = <&pm4125_l13>;
+	vdda-phy-dpdm-supply = <&pm4125_l21>;
+
+	status = "okay";
+};
+
+&usb_qmpphy {
+	vdda-phy-supply = <&pm4125_l8>;
+	vdda-pll-supply = <&pm4125_l13>;
+
+	status = "okay";
+};
+
+&usb_2 {
+	dr_mode = "peripheral";
+
+	status = "okay";
+};
+
+&usb_2_hsphy {
+	vdd-supply = <&pm4125_l12>;
+	vdda-pll-supply = <&pm4125_l13>;
+	vdda-phy-dpdm-supply = <&pm4125_l21>;
+
+	status = "okay";
+};

-- 
2.34.1

[PATCH v4 3/4] arm64: dts: qcom: Enable USB controllers on Shikra CQM platform

[Krishna Kurapati]

Enable both USB controllers in device mode on Shikra CQM platform.

Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts | 35 +++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
index 0a52ab9b7a4c..e58b40389ad3 100644
--- a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
+++ b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
@@ -38,3 +38,38 @@ &sdhc_1 {
 
 	status = "okay";
 };
+
+&usb_1 {
+	dr_mode = "peripheral";
+
+	status = "okay";
+};
+
+&usb_1_hsphy {
+	vdd-supply = <&pm4125_l12>;
+	vdda-pll-supply = <&pm4125_l13>;
+	vdda-phy-dpdm-supply = <&pm4125_l21>;
+
+	status = "okay";
+};
+
+&usb_qmpphy {
+	vdda-phy-supply = <&pm4125_l8>;
+	vdda-pll-supply = <&pm4125_l13>;
+
+	status = "okay";
+};
+
+&usb_2 {
+	dr_mode = "peripheral";
+
+	status = "okay";
+};
+
+&usb_2_hsphy {
+	vdd-supply = <&pm4125_l12>;
+	vdda-pll-supply = <&pm4125_l13>;
+	vdda-phy-dpdm-supply = <&pm4125_l21>;
+
+	status = "okay";
+};

-- 
2.34.1

[PATCH v4 4/4] arm64: dts: qcom: Enable USB controllers on Shikra IQS platform

[Krishna Kurapati]

Enable both usb controllers in device mode on Shikra IQS platform.

Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts | 35 +++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts
index 3003a47bd759..2d4e34ec3b82 100644
--- a/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts
+++ b/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts
@@ -38,3 +38,38 @@ &sdhc_1 {
 
 	status = "okay";
 };
+
+&usb_1 {
+	dr_mode = "peripheral";
+
+	status = "okay";
+};
+
+&usb_1_hsphy {
+	vdd-supply = <&pm8150_l4>;
+	vdda-pll-supply = <&pm8150_l12>;
+	vdda-phy-dpdm-supply = <&pm8150_l13>;
+
+	status = "okay";
+};
+
+&usb_qmpphy {
+	vdda-phy-supply = <&pm8150_l6>;
+	vdda-pll-supply = <&pm8150_l12>;
+
+	status = "okay";
+};
+
+&usb_2 {
+	dr_mode = "peripheral";
+
+	status = "okay";
+};
+
+&usb_2_hsphy {
+	vdd-supply = <&pm8150_l4>;
+	vdda-pll-supply = <&pm8150_l12>;
+	vdda-phy-dpdm-supply = <&pm8150_l13>;
+
+	status = "okay";
+};

-- 
2.34.1

Re: [PATCH v4 1/4] arm64: dts: qcom: Add support for usb nodes on Shikra

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Missing `interconnects` property in USB DWC3 nodes
- [Low] Device tree nodes are not sorted by unit address
--

--- Patch [1]: [PATCH v4 1/4] arm64: dts: qcom: Add support for usb nodes on Shikra ---
commit 9fc8f1d9119cfd32b07a66f8220c54e03c7caa27
Author: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>

arm64: dts: qcom: Add support for usb nodes on Shikra

Add support for both USB controllers and their respective phys on Shikra.

> diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi
> index 4e5bc9e17c8ed..7f5d584fc17ba 100644
> --- a/arch/arm64/boot/dts/qcom/shikra.dtsi
> +++ b/arch/arm64/boot/dts/qcom/shikra.dtsi

[ ... ]

> @@ -442,6 +443,85 @@ gcc: clock-controller@1400000 {
>  			#power-domain-cells = <1>;
>  		};
>  
> +		usb_1_hsphy: phy@1613000 {
> +			compatible = "qcom,shikra-qusb2-phy";
> +			reg = <0x0 0x01613000 0x0 0x180>;

[ ... ]

> +		usb_2_hsphy: phy@1617000 {
> +			compatible = "qcom,shikra-qusb2-phy";
> +			reg = <0x0 0x01617000 0x0 0x180>;
> +
> +			clocks = <&gcc GCC_AHB2PHY_USB_CLK>,
> +				 <&rpmcc RPM_SMD_XO_CLK_SRC>;
> +			clock-names = "cfg_ahb", "ref";
> +
> +			resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
> +			nvmem-cells = <&qusb2_hstx_trim_2>;
> +			#phy-cells = <0>;
> +
> +			status = "disabled";
> +		};
> +
> +		usb_qmpphy: phy@1615000 {
> +			compatible = "qcom,shikra-qmp-usb3-dp-phy";
> +			reg = <0x0 0x01615000 0x0 0x2000>;

[Severity: Low]
This isn't a bug, but are these nodes sorted correctly by unit address?

The usb_2_hsphy node at 1617000 is placed before the usb_qmpphy node at
1615000, which doesn't follow the convention to sort sibling nodes
alphanumerically by their unit address.

[ ... ]

> @@ -493,6 +573,11 @@ qusb2_hstx_trim_1: hstx-trim@25b {
>  				bits = <1 4>;
>  			};
>  
> +			qusb2_hstx_trim_2: hstx-trim@25a {
> +				reg = <0x25a 0x1>;
> +				bits = <4 4>;
> +			};

[Severity: Low]
This isn't a bug, but should hstx-trim@25a be placed before hstx-trim@25b
to maintain alphanumeric sorting by unit address?

[ ... ]

> @@ -640,6 +725,142 @@ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
>  			};
>  		};
>  
> +		usb_2: usb@4c00000 {
> +			compatible = "qcom,shikra-dwc3", "qcom,snps-dwc3";
> +			reg = <0x0 0x04c00000 0x0 0xfc100>;

[Severity: High]
Does this node need an interconnects property?

Without interconnects specified, the DWC3 core driver won't vote for
bandwidth. If other consumers drop their votes, the system NoC might throttle
or gate the path, potentially causing USB DMA transfer stalls, device
disconnects, or system freezes.

Since of_icc_get returns NULL when the property is missing, the driver
will silently skip voting without showing probe errors.

[ ... ]

> +		usb_1: usb@4e00000 {
> +			compatible = "qcom,shikra-dwc3", "qcom,snps-dwc3";
> +			reg = <0x0 0x04e00000 0x0 0xfc100>;

[Severity: High]
Is the interconnects property missing here as well?

Similar to the usb_2 node, omitting interconnects might expose the hardware
to starvation if the system NoC throttles or gates the path when other
devices become idle.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260721-usb-shikra-dt-v4-v4-0-2e7a092d7f27@oss.qualcomm.com?part=1

Re: [PATCH v4 1/4] arm64: dts: qcom: Add support for usb nodes on Shikra

[Dmitry Baryshkov]

On Tue, Jul 21, 2026 at 03:23:45PM +0530, Krishna Kurapati wrote:
> Add support for both USB controllers and their respective phys on Shikra.
> 
> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/shikra.dtsi | 221 +++++++++++++++++++++++++++++++++++
>  1 file changed, 221 insertions(+)
> 
> +
> +		usb_qmpphy: phy@1615000 {

Should be before usb_2_hsphy: phy@1617000.

> +			compatible = "qcom,shikra-qmp-usb3-dp-phy";
> +			reg = <0x0 0x01615000 0x0 0x2000>;
> +
> @@ -493,6 +573,11 @@ qusb2_hstx_trim_1: hstx-trim@25b {
>  				bits = <1 4>;
>  			};
>  
> +			qusb2_hstx_trim_2: hstx-trim@25a {

Before 25b

> +				reg = <0x25a 0x1>;
> +				bits = <4 4>;
> +			};
> +
>  			gpu_speed_bin: gpu-speed-bin@2006 {
>  				reg = <0x2006 0x2>;
>  				bits = <5 8>;
> @@ -640,6 +725,142 @@ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
>  			};
>  		};
>  
> +		usb_2: usb@4c00000 {
> +			compatible = "qcom,shikra-dwc3", "qcom,snps-dwc3";
> +			reg = <0x0 0x04c00000 0x0 0xfc100>;

Here and in usb_1, missing interconnects.

> +

-- 
With best wishes
Dmitry

Re: [PATCH v4 2/4] arm64: dts: qcom: Enable USB controllers on Shikra CQS platform

[Dmitry Baryshkov]

On Tue, Jul 21, 2026 at 03:23:46PM +0530, Krishna Kurapati wrote:
> Enable both USB controllers in device mode on Shikra CQS platform.
> 
> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts | 35 +++++++++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
> index b3f19a64d7ae..006e24a62f5c 100644
> --- a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
> +++ b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
> @@ -38,3 +38,38 @@ &sdhc_1 {
>  
>  	status = "okay";
>  };
> +
> +&usb_1 {
> +	dr_mode = "peripheral";

Why is peripheral-only?

> +
> +	status = "okay";
> +};
> +

-- 
With best wishes
Dmitry

Re: [PATCH v4 3/4] arm64: dts: qcom: Enable USB controllers on Shikra CQM platform

[Dmitry Baryshkov]

On Tue, Jul 21, 2026 at 03:23:47PM +0530, Krishna Kurapati wrote:
> Enable both USB controllers in device mode on Shikra CQM platform.
> 
> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts | 35 +++++++++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
> index 0a52ab9b7a4c..e58b40389ad3 100644
> --- a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
> +++ b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
> @@ -38,3 +38,38 @@ &sdhc_1 {
>  
>  	status = "okay";
>  };
> +
> +&usb_1 {
> +	dr_mode = "peripheral";

Why?

> +
> +	status = "okay";
> +};
> +

-- 
With best wishes
Dmitry

Re: [PATCH v4 4/4] arm64: dts: qcom: Enable USB controllers on Shikra IQS platform

[Dmitry Baryshkov]

On Tue, Jul 21, 2026 at 03:23:48PM +0530, Krishna Kurapati wrote:
> Enable both usb controllers in device mode on Shikra IQS platform.
> 
> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts | 35 +++++++++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts
> index 3003a47bd759..2d4e34ec3b82 100644
> --- a/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts
> +++ b/arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts
> @@ -38,3 +38,38 @@ &sdhc_1 {
>  
>  	status = "okay";
>  };
> +
> +&usb_1 {
> +	dr_mode = "peripheral";

Why?

> +
> +	status = "okay";
> +};
> +

-- 
With best wishes
Dmitry

Re: [PATCH v4 2/4] arm64: dts: qcom: Enable USB controllers on Shikra CQS platform

[Krishna Kurapati]

On 7/22/2026 3:07 AM, Dmitry Baryshkov wrote:
> On Tue, Jul 21, 2026 at 03:23:46PM +0530, Krishna Kurapati wrote:
>> Enable both USB controllers in device mode on Shikra CQS platform.
>>
>> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
>> ---
>>   arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts | 35 +++++++++++++++++++++++++++++
>>   1 file changed, 35 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
>> index b3f19a64d7ae..006e24a62f5c 100644
>> --- a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
>> +++ b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
>> @@ -38,3 +38,38 @@ &sdhc_1 {
>>   
>>   	status = "okay";
>>   };
>> +
>> +&usb_1 {
>> +	dr_mode = "peripheral";
> 
> Why is peripheral-only?
> 

On First controller of CQS/CQM platforms, usb-role-swtich is controller 
by PM4125 and on second controller of CQS/CQM platforms, and both 
controllers of IQS, its controller by Cypress PD controller. I will push 
out the PM4125 changes in a different patch set since couple of issues 
are under debug. And the cypress pd controller changes are still under 
development. Hence enabled both controllers in device mode for now.

>> +
>> +	status = "okay";
>> +};
>> +
> 

Re: [PATCH v4 2/4] arm64: dts: qcom: Enable USB controllers on Shikra CQS platform

[Dmitry Baryshkov]

On Wed, Jul 22, 2026 at 07:22:47AM +0530, Krishna Kurapati wrote:
> 
> 
> On 7/22/2026 3:07 AM, Dmitry Baryshkov wrote:
> > On Tue, Jul 21, 2026 at 03:23:46PM +0530, Krishna Kurapati wrote:
> > > Enable both USB controllers in device mode on Shikra CQS platform.
> > > 
> > > Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> > > ---
> > >   arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts | 35 +++++++++++++++++++++++++++++
> > >   1 file changed, 35 insertions(+)
> > > 
> > > diff --git a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
> > > index b3f19a64d7ae..006e24a62f5c 100644
> > > --- a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
> > > +++ b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
> > > @@ -38,3 +38,38 @@ &sdhc_1 {
> > >   	status = "okay";
> > >   };
> > > +
> > > +&usb_1 {
> > > +	dr_mode = "peripheral";
> > 
> > Why is peripheral-only?
> > 
> 
> On First controller of CQS/CQM platforms, usb-role-swtich is controller by
> PM4125 and on second controller of CQS/CQM platforms, and both controllers
> of IQS, its controller by Cypress PD controller. I will push out the PM4125
> changes in a different patch set since couple of issues are under debug. And
> the cypress pd controller changes are still under development. Hence enabled
> both controllers in device mode for now.

That needs to be explained in the commit messages.

> 
> > > +
> > > +	status = "okay";
> > > +};
> > > +
> > 
> 

-- 
With best wishes
Dmitry

Re: [PATCH v4 2/4] arm64: dts: qcom: Enable USB controllers on Shikra CQS platform

[Krishna Kurapati]

On 7/22/2026 11:03 AM, Dmitry Baryshkov wrote:
> On Wed, Jul 22, 2026 at 07:22:47AM +0530, Krishna Kurapati wrote:
>>
>>
>> On 7/22/2026 3:07 AM, Dmitry Baryshkov wrote:
>>> On Tue, Jul 21, 2026 at 03:23:46PM +0530, Krishna Kurapati wrote:
>>>> Enable both USB controllers in device mode on Shikra CQS platform.
>>>>
>>>> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
>>>> ---
>>>>    arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts | 35 +++++++++++++++++++++++++++++
>>>>    1 file changed, 35 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
>>>> index b3f19a64d7ae..006e24a62f5c 100644
>>>> --- a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
>>>> +++ b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
>>>> @@ -38,3 +38,38 @@ &sdhc_1 {
>>>>    	status = "okay";
>>>>    };
>>>> +
>>>> +&usb_1 {
>>>> +	dr_mode = "peripheral";
>>>
>>> Why is peripheral-only?
>>>
>>
>> On First controller of CQS/CQM platforms, usb-role-swtich is controller by
>> PM4125 and on second controller of CQS/CQM platforms, and both controllers
>> of IQS, its controller by Cypress PD controller. I will push out the PM4125
>> changes in a different patch set since couple of issues are under debug. And
>> the cypress pd controller changes are still under development. Hence enabled
>> both controllers in device mode for now.
> 
> That needs to be explained in the commit messages.
> 

Since putting in commit message that there is a PD controller or the 
PM4125 will take care of OTG would be out of context, in cover letter 
can i mention that the above information, and state that future patches 
will enable OTG.

Regards,
Krishna,

Re: [PATCH v4 2/4] arm64: dts: qcom: Enable USB controllers on Shikra CQS platform

[Dmitry Baryshkov]

On Wed, Jul 22, 2026 at 12:33:55PM +0530, Krishna Kurapati wrote:
> 
> 
> On 7/22/2026 11:03 AM, Dmitry Baryshkov wrote:
> > On Wed, Jul 22, 2026 at 07:22:47AM +0530, Krishna Kurapati wrote:
> > > 
> > > 
> > > On 7/22/2026 3:07 AM, Dmitry Baryshkov wrote:
> > > > On Tue, Jul 21, 2026 at 03:23:46PM +0530, Krishna Kurapati wrote:
> > > > > Enable both USB controllers in device mode on Shikra CQS platform.
> > > > > 
> > > > > Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> > > > > ---
> > > > >    arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts | 35 +++++++++++++++++++++++++++++
> > > > >    1 file changed, 35 insertions(+)
> > > > > 
> > > > > diff --git a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
> > > > > index b3f19a64d7ae..006e24a62f5c 100644
> > > > > --- a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
> > > > > +++ b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
> > > > > @@ -38,3 +38,38 @@ &sdhc_1 {
> > > > >    	status = "okay";
> > > > >    };
> > > > > +
> > > > > +&usb_1 {
> > > > > +	dr_mode = "peripheral";
> > > > 
> > > > Why is peripheral-only?
> > > > 
> > > 
> > > On First controller of CQS/CQM platforms, usb-role-swtich is controller by
> > > PM4125 and on second controller of CQS/CQM platforms, and both controllers
> > > of IQS, its controller by Cypress PD controller. I will push out the PM4125
> > > changes in a different patch set since couple of issues are under debug. And
> > > the cypress pd controller changes are still under development. Hence enabled
> > > both controllers in device mode for now.
> > 
> > That needs to be explained in the commit messages.
> > 
> 
> Since putting in commit message that there is a PD controller or the PM4125

There is no PD controller on PM4125

> will take care of OTG would be out of context, in cover letter can i mention
> that the above information, and state that future patches will enable OTG.

Cover letter doesn't get recorded in the Git history. No.

-- 
With best wishes
Dmitry