From: sashiko-bot@kernel.org
To: "Neil Armstrong" <neil.armstrong@linaro.org>
Cc: conor+dt@kernel.org, robh@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v6 5/5] arm64: dts: qcom: sm8650-hdk: add SPMI ADC channels and thermal nodes
Date: Tue, 21 Jul 2026 15:47:44 +0000 [thread overview]
Message-ID: <20260721154745.057F01F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260721-topic-sm8x50-adc5-gen3-v6-5-a507f4a1e537@linaro.org>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Low] The Device Tree unit-address for the PM8550VE ADC channel node does not match its evaluated 'reg' property value, triggering a dtc warning.
- [Low] The patch series relies on an uncommitted header file ('qcom-adc5-gen3.h'), resulting in a build failure.
--
--- Patch [5]: [PATCH v6 5/5] arm64: dts: qcom: sm8650-hdk: add SPMI ADC channels and thermal nodes ---
commit 0f6771497277cdb9e2028ce4ba0b81d340cf6283
Author: Neil Armstrong <neil.armstrong@linaro.org>
arm64: dts: qcom: sm8650-hdk: add SPMI ADC channels and thermal nodes
Add the SPMI ADC channels on the PMK8550 SPMI5 ADC3 for the
other PMICS on the system.
The thermal nodes are sorted by the sensor channel to be
coherent with the system thermal nodes ordering.
> diff --git a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
> index eabc828c05b4c..2d6be57a2a80a 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts
[ ... ]
> +&pm8550_temp_alarm {
> + io-channels = <&pmk8550_vadc ADC5_GEN3_DIE_TEMP(1)>;
[Severity: Low]
Is there a missing header dependency for this patch series?
It looks like ADC5_GEN3_DIE_TEMP() is being used as a function-like macro
here, which appears to rely on a qcom-adc5-gen3.h header that might not be
included in this series. Does this cause a build failure during dtbs
compilation?
> + io-channel-names = "thermal";
> +};
[ ... ]
> + /* PM8550VE Channel nodes */
> + channel@503 {
> + reg = <ADC5_GEN3_DIE_TEMP(PMK8550VE_SID)>;
[Severity: Low]
Does this unit-address match the evaluated register address?
Assuming PMK8550VE_SID is 8, ADC5_GEN3_DIE_TEMP(PMK8550VE_SID) would likely
evaluate to 0x803. If so, should the node name be updated to channel@803 to
match the reg property and avoid a Device Tree compiler warning?
> + label = "pm8550ve_die_temp";
> + qcom,pre-scaling = <1 1>;
> + };
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260721-topic-sm8x50-adc5-gen3-v6-0-a507f4a1e537@linaro.org?part=5
next prev parent reply other threads:[~2026-07-21 15:47 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-21 15:31 [PATCH v6 0/5] arm64: dts: qcom: sm8[56]50: add PMIC5 Gen3 ADC channels Neil Armstrong
2026-07-21 15:31 ` [PATCH v6 1/5] arm64: dts: qcom: pmk8550: add VADC node Neil Armstrong
2026-07-21 15:40 ` sashiko-bot
2026-07-21 15:31 ` [PATCH v6 2/5] arm64: dts: qcom: sm8550-qrd: add SPMI ADC channels and thermal nodes Neil Armstrong
2026-07-21 15:49 ` sashiko-bot
2026-07-21 15:31 ` [PATCH v6 3/5] arm64: dts: qcom: sm8550-hdk: " Neil Armstrong
2026-07-21 15:37 ` Konrad Dybcio
2026-07-21 16:04 ` sashiko-bot
2026-07-21 15:31 ` [PATCH v6 4/5] arm64: dts: qcom: sm8650-qrd: " Neil Armstrong
2026-07-21 15:54 ` sashiko-bot
2026-07-21 17:02 ` Konrad Dybcio
2026-07-21 15:31 ` [PATCH v6 5/5] arm64: dts: qcom: sm8650-hdk: " Neil Armstrong
2026-07-21 15:47 ` sashiko-bot [this message]
2026-07-21 17:02 ` Konrad Dybcio
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