From: sashiko-bot@kernel.org
To: "Neil Armstrong" <neil.armstrong@linaro.org>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v6 4/5] arm64: dts: qcom: sm8650-qrd: add SPMI ADC channels and thermal nodes
Date: Tue, 21 Jul 2026 15:54:35 +0000 [thread overview]
Message-ID: <20260721155435.C011B1F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260721-topic-sm8x50-adc5-gen3-v6-4-a507f4a1e537@linaro.org>
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] Unrealistic and physically dangerous 125°C thermal trip points for external surfaces.
- [Low] Missing DT bindings header causes build failure.
- [Low] Device tree unit address mismatch for pm8550ve PMIC temperature channel.
--
--- Patch [4]: [PATCH v6 4/5] arm64: dts: qcom: sm8650-qrd: add SPMI ADC channels and thermal nodes ---
commit e319ddcc0f55ac8e62e9354e1059c060573915eb
Author: Neil Armstrong <neil.armstrong@linaro.org>
arm64: dts: qcom: sm8650-qrd: add SPMI ADC channels and thermal nodes
Add the SPMI ADC channels on the PMK8550 SPMI5 ADC3 for the
other PMICS on the system.
The thermal nodes are sorted by the sensor channel to be
coherent with the system thermal nodes ordering.
> diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
> index a3982ae229290..809c9efb23385 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
> @@ -158,6 +158,92 @@ platform {
> };
> };
>
> + thermal-zones {
> + skin-thermal {
> + thermal-sensors = <&pmk8550_vadc ADC5_GEN3_AMUX1_THM_100K_PU(1)>;
> +
> + trips {
> + trip-point0 {
> + temperature = <125000>;
> + hysteresis = <1000>;
> + type = "passive";
> + };
> + };
> + };
[Severity: High]
Is a passive trip point of 125°C realistic for skin-thermal and the other
external surface zones? This temperature seems extremely high for an external
surface and might prevent the OS from mitigating heat before causing hardware
damage or burns.
[ ... ]
> +&pm8550ve_temp_alarm {
> + io-channels = <&pmk8550_vadc ADC5_GEN3_DIE_TEMP(PMK8550VE_SID)>;
[Severity: Low]
Does this rely on a missing header file? It looks like the macros
ADC5_GEN3_DIE_TEMP and PMK8550VE_SID are not defined in this patch or the
current tree, which might cause a build failure when compiling the device
tree.
> + io-channel-names = "thermal";
> +};
[ ... ]
> +&pmk8550_vadc {
> + /* PM8550 Channel nodes */
[ ... ]
> + /* PM8550VE Channel nodes */
> + channel@503 {
> + reg = <ADC5_GEN3_DIE_TEMP(PMK8550VE_SID)>;
[Severity: Low]
If PMK8550VE_SID is defined as 8 on this board, will this evaluate to a reg
property of 0x803? If so, should the node be named channel@803 to match the
unit address and avoid dtc warnings?
> + label = "pm8550ve_die_temp";
> + qcom,pre-scaling = <1 1>;
> + };
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260721-topic-sm8x50-adc5-gen3-v6-0-a507f4a1e537@linaro.org?part=4
next prev parent reply other threads:[~2026-07-21 15:54 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-21 15:31 [PATCH v6 0/5] arm64: dts: qcom: sm8[56]50: add PMIC5 Gen3 ADC channels Neil Armstrong
2026-07-21 15:31 ` [PATCH v6 1/5] arm64: dts: qcom: pmk8550: add VADC node Neil Armstrong
2026-07-21 15:40 ` sashiko-bot
2026-07-21 15:31 ` [PATCH v6 2/5] arm64: dts: qcom: sm8550-qrd: add SPMI ADC channels and thermal nodes Neil Armstrong
2026-07-21 15:49 ` sashiko-bot
2026-07-21 15:31 ` [PATCH v6 3/5] arm64: dts: qcom: sm8550-hdk: " Neil Armstrong
2026-07-21 15:37 ` Konrad Dybcio
2026-07-21 16:04 ` sashiko-bot
2026-07-21 15:31 ` [PATCH v6 4/5] arm64: dts: qcom: sm8650-qrd: " Neil Armstrong
2026-07-21 15:54 ` sashiko-bot [this message]
2026-07-21 17:02 ` Konrad Dybcio
2026-07-21 15:31 ` [PATCH v6 5/5] arm64: dts: qcom: sm8650-hdk: " Neil Armstrong
2026-07-21 15:47 ` sashiko-bot
2026-07-21 17:02 ` Konrad Dybcio
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