From: sashiko-bot@kernel.org
To: "Aaron Kling" <webgeek1234@gmail.com>
Cc: conor+dt@kernel.org, devicetree@vger.kernel.org, robh@kernel.org
Subject: Re: [PATCH v3 2/2] soc/tegra: pmc: Add Tegra210B01 support
Date: Thu, 23 Jul 2026 02:57:42 +0000 [thread overview]
Message-ID: <20260723025743.0EF0A1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260722-t210b01-pmc-v3-2-1c5b970788f2@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Undocumented behavioral change: MBIST workaround disabled for Tegra210B01.
--
--- Patch [2]: [PATCH v3 2/2] soc/tegra: pmc: Add Tegra210B01 support ---
commit 5ceea53482957796a181bc224b13a9428679c927
Author: Alexandre Hamamdjian <azkali.limited@gmail.com>
soc/tegra: pmc: Add Tegra210B01 support
This commit introduces support for the PMC in the Tegra210B01 SoC. The
new SoC is described as being very similar to the original Tegra210,
with specific powergate removals for sata, venc, and ve2.
> diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
> index f419a5395545f..d133f445e4ec4 100644
> --- a/drivers/soc/tegra/pmc.c
> +++ b/drivers/soc/tegra/pmc.c
[ ... ]
> @@ -3897,6 +3897,66 @@ static const struct tegra_pmc_soc tegra210_pmc_soc = {
[ ... ]
> +static const struct tegra_pmc_soc tegra210b01_pmc_soc = {
> + .supports_core_domain = false,
> + .num_powergates = ARRAY_SIZE(tegra210b01_powergates),
> + .powergates = tegra210b01_powergates,
> + .num_cpu_powergates = ARRAY_SIZE(tegra210_cpu_powergates),
> + .cpu_powergates = tegra210_cpu_powergates,
> + .has_tsense_reset = true,
> + .has_gpu_clamps = true,
> + .needs_mbist_war = false,
[Severity: Medium]
The commit message mentions that the new SoC is very similar to the original
Tegra210 and specifically lists sata, venc, and ve2 as the only powergate
differences.
However, this line disables the MBIST workaround, differing from the original
tegra210_pmc_soc which has it enabled.
If the silicon erratum was fixed in the B01 stepping, could this hardware
behavioral change be documented in the commit message? Or is this an
accidental omission that might lead to powergating failures or hardware
instability on this silicon?
> + .has_io_pad_wren = true,
> + .maybe_tz_only = true,
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260722-t210b01-pmc-v3-0-1c5b970788f2@gmail.com?part=2
next prev parent reply other threads:[~2026-07-23 2:57 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-23 2:46 [PATCH v3 0/2] soc/tegra: pmc: Add Tegra210B01 support Aaron Kling via B4 Relay
2026-07-23 2:46 ` [PATCH v3 1/2] dt-bindings: soc: tegra: pmc: Document Tegra210B01 Aaron Kling via B4 Relay
2026-07-23 2:56 ` sashiko-bot
2026-07-23 2:46 ` [PATCH v3 2/2] soc/tegra: pmc: Add Tegra210B01 support Aaron Kling via B4 Relay
2026-07-23 2:57 ` sashiko-bot [this message]
2026-07-23 4:08 ` Mikko Perttunen
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