Re: [PATCH net-next 4/7] net: xilinx: axienet: Add 10G/25G (XXV) ethernet support

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Premature successful exit from `readl_poll_timeout` when polling a multi-bit mask for GT Wizard Reset Done.
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--- Patch [4]: [PATCH net-next 4/7] net: xilinx: axienet: Add 10G/25G (XXV) ethernet support ---
commit 5988b03ccef0c2a2d43d3fb883b49b324011c734
Author: Suraj Gupta <suraj.gupta2@amd.com>

net: xilinx: axienet: Add 10G/25G (XXV) ethernet support

This commit adds support for the Xilinx XXV Ethernet IP, implementing a
10G/25G Ethernet MAC. It introduces the XXV-specific logic in new files
and sets up the MAC configuration through an axienet_10g25g_config object.

Link: https://docs.amd.com/r/en-US/pg210-25g-ethernet

> diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_xxv.c b/drivers/net/ethernet/xilinx/xilinx_axienet_xxv.c
> new file mode 100644
> --- /dev/null
> +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_xxv.c

[ ... ]

> +static int axienet_xxv_poll_link_ready(struct net_device *ndev)
> +{
> +	struct axienet_local *lp = netdev_priv(ndev);
> +	u32 val;
> +	int ret;
> +
> +	/* Confirm XXV Ethernet is up: on IP v3.2+, wait for GT
> +	 * reset-done before further register access, then poll until
> +	 * RX PCS block lock is asserted.
> +	 */
> +	if (axienet_xxv_ip_has_gtwiz_status(lp->xxv_ip_version)) {
> +		ret = readl_poll_timeout(lp->regs + XXV_STAT_GTWIZ_OFFSET,
> +					 val, (val & XXV_GTWIZ_RESET_DONE),

[Severity: High]
XXV_GTWIZ_RESET_DONE is defined as (BIT(0) | BIT(1)). Since the condition
(val & XXV_GTWIZ_RESET_DONE) evaluates to true if either bit is set, could
this exit the polling loop prematurely before both TX and RX resets are
fully complete?

Would it be safer to use ((val & XXV_GTWIZ_RESET_DONE) == 
XXV_GTWIZ_RESET_DONE) to guarantee the hardware is fully reset before
proceeding with MAC initialization?

> +					 XXV_LINK_POLL_INTERVAL_US,
> +					 DELAY_OF_ONE_MILLISEC);
> +		if (ret) {
> +			netdev_err(ndev, "XXV MAC GT reset not complete! Cross-check the MAC ref clock configuration\n");
> +			return ret;
> +		}
> +	}

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Sashiko AI review · https://sashiko.dev/#/patchset/20260723123838.125145-1-suraj.gupta2@amd.com?part=4