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From: sashiko-bot@kernel.org
To: "Jun Nie" <jun.nie@linaro.org>
Cc: dri-devel@lists.freedesktop.org, robh@kernel.org,
	conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v5 4/6] drm/msm/dsi: Support dual panel use case with single CRTC
Date: Mon, 27 Jul 2026 08:25:50 +0000	[thread overview]
Message-ID: <20260727082551.6C1761F00A3F@smtp.kernel.org> (raw)
In-Reply-To: <20260727-sm8650-7-1-bonded-dsi-v5-4-c042266b9eeb@linaro.org>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Mutating the shared `dsc->pic_width` field in the DSI host driver corrupts the upstream DPU DSC configuration for dual-panel displays.
--

--- Patch [4]: [PATCH v5 4/6] drm/msm/dsi: Support dual panel use case with single CRTC ---
commit ab7fbd44233bae5d942988068bde384adcd14200
Author: Jun Nie <jun.nie@linaro.org>

drm/msm/dsi: Support dual panel use case with single CRTC

Support a hardware configuration where two independent DSI panels are
driven by a single, synchronous CRTC. This configuration uses a bonded
DSI link to provide a unified vblank for both displays.

> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
> index ca9862848a6ab..badddb534b01a 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
> @@ -1024,7 +1025,10 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
>  			return;
>  		}
>  
> -		dsc->pic_width = mode->hdisplay;
> +		if (msm_host->is_dual_panel)
> +			dsc->pic_width = hdisplay;
> +		else
> +			dsc->pic_width = mode->hdisplay;

[Severity: High]
Does mutating the shared dsc->pic_width here corrupt the upstream DPU DSC
configuration for dual-panel displays?

In a dual-panel setup, dsi_timing_setup() overwrites the shared
dsc->pic_width with hdisplay (which is already halved for bonded DSI).

Later in the atomic commit sequence, dpu_encoder_prep_dsc() reads this
mutated value:

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:dpu_encoder_prep_dsc() {
    ...
    pic_width = dsc->pic_width;
    ...
    enc_ip_w = intf_ip_w / num_dsc;
    ...
}

Because dsc->pic_width is already halved here, dividing it again by num_dsc
(2) results in each DSC encoder being incorrectly configured to process a
quarter of the screen width instead of half.

Could this misconfigure the DPU pipeline and lead to display corruption?

>  		dsc->pic_height = mode->vdisplay;
>  		DBG("Mode %dx%d\n", dsc->pic_width, dsc->pic_height);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260727-sm8650-7-1-bonded-dsi-v5-0-c042266b9eeb@linaro.org?part=4

  reply	other threads:[~2026-07-27  8:25 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-27  8:08 [PATCH v5 0/6] Add support to 2 panels in bonded-DSI mode Jun Nie
2026-07-27  8:08 ` [PATCH v5 1/6] dt-bindings: display: panel: Modify reset gpio number constrain Jun Nie
2026-07-27  8:18   ` sashiko-bot
2026-07-27  8:08 ` [PATCH v5 2/6] drm/msm/dsi: support DSC configurations with slice_per_pkt > 1 Jun Nie
2026-07-27  8:08 ` [PATCH v5 3/6] drm/mipi-dsi: Add flag to support dual-panel configurations Jun Nie
2026-07-27  8:08 ` [PATCH v5 4/6] drm/msm/dsi: Support dual panel use case with single CRTC Jun Nie
2026-07-27  8:25   ` sashiko-bot [this message]
2026-07-27  8:08 ` [PATCH v5 5/6] dt-bindings: display: Add Synaptics R63455 panel support Jun Nie
2026-07-27  8:18   ` sashiko-bot
2026-07-27  9:47   ` Rob Herring (Arm)
2026-07-27  8:08 ` [PATCH v5 6/6] drm/panel: Add driver for Synaptics R63455 DSI panel Jun Nie
2026-07-27  8:20   ` sashiko-bot

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