From: sashiko-bot@kernel.org
To: "Luo Jie" <jie.luo@oss.qualcomm.com>
Cc: conor+dt@kernel.org, devicetree@vger.kernel.org, robh@kernel.org
Subject: Re: [PATCH v2 08/12] clk: qcom: ipq-cmn-pll: Add EPHY-RAW clock support
Date: Fri, 07 Aug 2026 07:04:57 +0000 [thread overview]
Message-ID: <20260807070457.846A81F00A3D@smtp.kernel.org> (raw)
In-Reply-To: <20260806-qcom_ipq5210_cmnpll-v2-8-cce718b8ec17@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] clk_ephy_raw_determine_rate() fails to respect req->min_rate and req->max_rate boundaries.
--
--- Patch [8]: [PATCH v2 08/12] clk: qcom: ipq-cmn-pll: Add EPHY-RAW clock support ---
commit 49a391af3ca59aa96545f77e2d5dd595f1603325
Author: Luo Jie <jie.luo@oss.qualcomm.com>
clk: qcom: ipq-cmn-pll: Add EPHY-RAW clock support
This commit introduces EPHY-RAW clock support for the IPQ5210 from the CMN
PLL, providing the raw reference clock to the SoC-integrated Ethernet PHY. It
adds clock operations and register definitions to select the output frequency
between 125 MHz and 312.5 MHz based on the required link speed.
> diff --git a/drivers/clk/qcom/ipq-cmn-pll.c b/drivers/clk/qcom/ipq-cmn-pll.c
> index 356988c03a7ae..586f9c620e7e1 100644
> --- a/drivers/clk/qcom/ipq-cmn-pll.c
> +++ b/drivers/clk/qcom/ipq-cmn-pll.c
[ ... ]
> +static int clk_ephy_raw_determine_rate(struct clk_hw *hw,
> + struct clk_rate_request *req)
> +{
> + unsigned long rate_125m = 125000000UL, rate_312p5m = 312500000UL;
> +
> + /* Pick whichever of the two supported rates is closer to the request */
> + req->rate = abs_diff(req->rate, rate_125m) < abs_diff(req->rate, rate_312p5m) ?
> + rate_125m : rate_312p5m;
> +
> + return 0;
> +}
[Severity: Medium]
Does this rate selection logic need to check the req->min_rate and
req->max_rate boundaries?
It appears that the target frequency is selected unconditionally based solely
on the absolute difference from req->rate, ignoring bounds applied via QoS or
OPP constraints.
If a clock consumer requests a rate with a strict upper boundary (for example,
req->max_rate is 250 MHz and req->rate is clamped to 250 MHz), the absolute
difference to 312.5 MHz (62.5 MHz) is less than the difference to 125 MHz
(125 MHz).
Could this result in selecting a frequency outside the permissible bounds,
violating the Common Clock Framework determine_rate API contract and causing
upstream rate-setting routines to fail?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260806-qcom_ipq5210_cmnpll-v2-0-cce718b8ec17@oss.qualcomm.com?part=8
next prev parent reply other threads:[~2026-08-07 7:05 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-07 6:53 [PATCH v2 00/12] clk: qcom: ipq-cmn-pll: Add IPQ5210 CMN PLL support Luo Jie
2026-08-07 6:53 ` [PATCH v2 01/12] clk: qcom: ipq-cmn-pll: Use devm_clk_hw_register_fixed_rate_parent_data Luo Jie
2026-08-07 6:53 ` [PATCH v2 02/12] dt-bindings: clock: qcom: Add CMN PLL support for IPQ5210 SoC Luo Jie
2026-08-07 6:53 ` [PATCH v2 03/12] clk: divider: Introduce CLK_DIVIDER_EVEN_INTEGERS_NO_OFFSET flag Luo Jie
2026-08-07 7:12 ` sashiko-bot
2026-08-07 6:53 ` [PATCH v2 04/12] clk: qcom: clk-regmap-divider: Support CLK_DIVIDER_* flags Luo Jie
2026-08-07 7:03 ` sashiko-bot
2026-08-07 6:53 ` [PATCH v2 05/12] clk: qcom: ipq-cmn-pll: Add NSS clock support Luo Jie
2026-08-07 7:18 ` sashiko-bot
2026-08-07 6:53 ` [PATCH v2 06/12] clk: qcom: ipq-cmn-pll: Add PPE " Luo Jie
2026-08-07 6:53 ` [PATCH v2 07/12] clk: qcom: ipq-cmn-pll: Add PON reference " Luo Jie
2026-08-07 7:03 ` sashiko-bot
2026-08-07 6:53 ` [PATCH v2 08/12] clk: qcom: ipq-cmn-pll: Add EPHY-RAW " Luo Jie
2026-08-07 7:04 ` sashiko-bot [this message]
2026-08-07 6:53 ` [PATCH v2 09/12] clk: qcom: ipq-cmn-pll: Add clock gate support for fixed clocks Luo Jie
2026-08-07 6:53 ` [PATCH v2 10/12] clk: qcom: ipq-cmn-pll: Add all output clocks for IPQ5210 Luo Jie
2026-08-07 6:53 ` [PATCH v2 11/12] arm64: dts: qcom: ipq5210: Add CMN PLL device node Luo Jie
2026-08-07 6:53 ` [PATCH v2 12/12] arm64: dts: qcom: Update IPQ5210 xo_board to use fixed factor clock Luo Jie
2026-08-07 7:22 ` sashiko-bot
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