From: Changhuang Liang <changhuang.liang@starfivetech.com>
To: Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>, Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Philipp Zabel <p.zabel@pengutronix.de>,
Emil Renner Berthing <kernel@esmil.dk>
Cc: Chen Wang <unicorn_wang@outlook.com>,
Inochi Amaoto <inochiama@gmail.com>,
Alexey Charkov <alchark@gmail.com>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Keguang Zhang <keguang.zhang@gmail.com>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
Changhuang Liang <changhuang.liang@starfivetech.com>
Subject: [PATCH v4 6/8] reset: starfive: Add syscon reset driver support
Date: Sat, 8 Aug 2026 18:50:52 -0700 [thread overview]
Message-ID: <20260809015054.210577-7-changhuang.liang@starfivetech.com> (raw)
In-Reply-To: <20260809015054.210577-1-changhuang.liang@starfivetech.com>
Add syscon reset driver for JHB100 SoC.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
---
drivers/reset/starfive/Kconfig | 9 +++
drivers/reset/starfive/Makefile | 1 +
.../starfive/reset-starfive-jhb100-syscon.c | 62 +++++++++++++++++++
3 files changed, 72 insertions(+)
create mode 100644 drivers/reset/starfive/reset-starfive-jhb100-syscon.c
diff --git a/drivers/reset/starfive/Kconfig b/drivers/reset/starfive/Kconfig
index ce00495be6ad..d96cfb59f51c 100644
--- a/drivers/reset/starfive/Kconfig
+++ b/drivers/reset/starfive/Kconfig
@@ -28,3 +28,12 @@ config RESET_STARFIVE_JHB100
default ARCH_STARFIVE
help
This enables the reset controller driver for the StarFive JHB100 SoC.
+
+config RESET_STARFIVE_JHB100_SYSCON
+ tristate "StarFive JHB100 SYSCON Reset Driver"
+ depends on ARCH_STARFIVE || COMPILE_TEST
+ select RESET_STARFIVE_COMMON
+ default m if ARCH_STARFIVE
+ help
+ This enables the SYSCON reset controller driver for the StarFive
+ JHB100 SoC.
diff --git a/drivers/reset/starfive/Makefile b/drivers/reset/starfive/Makefile
index 217002302a9f..d5033d723167 100644
--- a/drivers/reset/starfive/Makefile
+++ b/drivers/reset/starfive/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_RESET_STARFIVE_COMMON) += reset-starfive-common.o
obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o
obj-$(CONFIG_RESET_STARFIVE_JH7110) += reset-starfive-jh7110.o
obj-$(CONFIG_RESET_STARFIVE_JHB100) += reset-starfive-jhb100.o
+obj-$(CONFIG_RESET_STARFIVE_JHB100_SYSCON) += reset-starfive-jhb100-syscon.o
diff --git a/drivers/reset/starfive/reset-starfive-jhb100-syscon.c b/drivers/reset/starfive/reset-starfive-jhb100-syscon.c
new file mode 100644
index 000000000000..55d84e6ad2a8
--- /dev/null
+++ b/drivers/reset/starfive/reset-starfive-jhb100-syscon.c
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * SYSCON Reset driver for the StarFive JHB100 SoC
+ *
+ * Copyright (C) 2025 StarFive Technology Co., Ltd.
+ */
+
+#include <dt-bindings/reset/starfive,jhb100-crg.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <soc/starfive/reset-starfive-common.h>
+
+#include "reset-starfive-common.h"
+
+static const struct starfive_reset_info jhb100_pcierp_info = {
+ .nr_resets = (JHB100_PCIERP_SYSCONRST_PE2RST_OUT + 1),
+ .assert_offset = 0x14c,
+ .status_offset = 0x14c,
+ .discontiguous = false,
+ .active_low = true,
+};
+
+static int jhb100_syscon_reset_probe(struct platform_device *pdev)
+{
+ struct starfive_reset_info *info;
+ void __iomem *base;
+
+ base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+ info = (struct starfive_reset_info *)of_device_get_match_data(&pdev->dev);
+ if (!info)
+ return -ENODEV;
+
+ return reset_starfive_register_with_info(&pdev->dev, pdev->dev.of_node,
+ base + info->assert_offset,
+ base + info->status_offset,
+ NULL, info, THIS_MODULE);
+}
+
+static const struct of_device_id jhb100_syscon_reset_dt_ids[] = {
+ {
+ .compatible = "starfive,jhb100-pcierp-syscon",
+ .data = &jhb100_pcierp_info,
+ },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, jhb100_syscon_reset_dt_ids);
+
+static struct platform_driver jhb100_syscon_reset_driver = {
+ .probe = jhb100_syscon_reset_probe,
+ .driver = {
+ .name = "jhb100-syscon-reset",
+ .of_match_table = jhb100_syscon_reset_dt_ids,
+ },
+};
+module_platform_driver(jhb100_syscon_reset_driver);
+
+MODULE_AUTHOR("Changhuang Liang <changhuang.liang@starfivetech.com>");
+MODULE_DESCRIPTION("StarFive JHB100 SYSCON reset driver");
+MODULE_LICENSE("GPL");
--
2.25.1
next prev parent reply other threads:[~2026-08-09 1:52 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-09 1:50 [PATCH v4 0/8] Add StarFive JHB100 syscon modules Changhuang Liang
2026-08-09 1:50 ` [PATCH v4 1/8] dt-bindings: soc: starfive: " Changhuang Liang
2026-08-09 1:50 ` [PATCH v4 2/8] clk: starfive: Add system-0 domain PLL clock driver Changhuang Liang
2026-08-09 1:50 ` [PATCH v4 3/8] clk: starfive: Add peripheral-0 " Changhuang Liang
2026-08-09 1:50 ` [PATCH v4 4/8] clk: starfive: Add Peripheral-1 " Changhuang Liang
2026-08-09 1:50 ` [PATCH v4 5/8] reset: starfive: Introduce active_low Changhuang Liang
2026-08-09 1:50 ` Changhuang Liang [this message]
2026-08-09 1:50 ` [PATCH v4 7/8] soc: starfive: Add socinfo driver for JHB100 SoC Changhuang Liang
2026-08-09 1:50 ` [PATCH v4 8/8] riscv: dts: starfive: jhb100: Add syscon nodes Changhuang Liang
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