From: sashiko-bot@kernel.org
To: "Shawn Guo" <shengchao.guo@oss.qualcomm.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v10 1/6] arm64: dts: qcom: Add device tree for Nord SoC series
Date: Mon, 10 Aug 2026 11:21:46 +0000 [thread overview]
Message-ID: <20260810112147.2F9F21F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260810110726.775084-2-shengchao.guo@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Missing 'critical' trip points in thermal zones.
--
--- Patch [1]: [PATCH v10 1/6] arm64: dts: qcom: Add device tree for Nord SoC series ---
commit 2e111a76a0005ef21158cf2e53ba21499ce90eed
Author: Shawn Guo <shengchao.guo@oss.qualcomm.com>
arm64: dts: qcom: Add device tree for Nord SoC series
This commit adds the base device tree include for the Nord SoC series.
It describes core hardware components including Oryon cores, GICv3,
TSENS thermal sensors, and various other controllers.
> diff --git a/arch/arm64/boot/dts/qcom/nord.dtsi b/arch/arm64/boot/dts/qcom/nord.dtsi
> new file mode 100644
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/nord.dtsi
[ ... ]
> + thermal_zones: thermal-zones {
> + ddr-0-0-thermal {
> + polling-delay-passive = <0>;
> + polling-delay = <0>;
> + thermal-sensors = <&tsens0 0>;
> +
> + trips {
> + trip-point0 {
> + temperature = <105000>;
> + hysteresis = <10000>;
> + type = "passive";
> + };
> +
> + trip-point1 {
> + temperature = <115000>;
> + hysteresis = <10000>;
> + type = "passive";
> + };
[Severity: High]
Should the upper-bound trip points (like trip-point1 here, and throughout
the other thermal zones in this file) be defined as "critical" instead of
"passive"?
If the SoC reaches these peak temperatures (115C or 125C) and passive
cooling fails to mitigate the temperature rise, the thermal framework will
only attempt further passive cooling rather than an emergency shutdown.
Additionally, without a critical trip point, does this prevent the TSENS
hardware driver from properly programming the upper-bound thermal protection
interrupts?
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260810110726.775084-1-shengchao.guo@oss.qualcomm.com?part=1
next prev parent reply other threads:[~2026-08-10 11:21 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-10 11:07 [PATCH v10 0/6] Add initial device trees for Nord platform Shawn Guo
2026-08-10 11:07 ` [PATCH v10 1/6] arm64: dts: qcom: Add device tree for Nord SoC series Shawn Guo
2026-08-10 11:21 ` sashiko-bot [this message]
2026-08-10 11:07 ` [PATCH] remoteproc: qcom_q6v5_pas: add HPASS ADSP cluster boot-order and SSR coupling Shawn Guo
2026-08-10 11:17 ` sashiko-bot
2026-08-10 11:29 ` Shawn Guo
2026-08-10 11:07 ` [PATCH v10 2/6] arm64: dts: qcom: Add device tree for Nord GearVM variant Shawn Guo
2026-08-10 11:23 ` sashiko-bot
2026-08-10 11:07 ` [PATCH v10 3/6] arm64: dts: qcom: Add device tree for Nord Embedded variant Shawn Guo
2026-08-10 11:07 ` [PATCH v10 4/6] dt-bindings: arm: qcom: Document Nord reference boards Shawn Guo
2026-08-10 11:07 ` [PATCH v10 5/6] arm64: dts: qcom: Add device tree for Nord Ride board Shawn Guo
2026-08-10 11:07 ` [PATCH v10 6/6] arm64: dts: qcom: Add device tree for Nord RRD board Shawn Guo
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