Re: [PATCH v10 2/6] arm64: dts: qcom: Add device tree for Nord GearVM variant

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] The scmi23 node introduces a thermal sensor protocol (protocol@15) which is not documented in the commit message.
- [Low] The dummy interrupts assigned to SCMI nodes scmi57 through scmi63 erroneously claim GIC_ESPI 32 through 38, conflicting with the statically assigned interrupts for apps_smmu_0.
--

--- Patch [2]: [PATCH v10 2/6] arm64: dts: qcom: Add device tree for Nord GearVM variant ---
commit 948fb9a917a28aaf25a94ebad3d151be888b0a2f
Author: Deepti Jaggi <deepti.jaggi@oss.qualcomm.com>

arm64: dts: qcom: Add device tree for Nord GearVM variant

This commit adds a new device tree file for the Nord GearVM variant, where a
VM controls platform resources as an SCMI server. It exposes shared memory
regions, QUPV3 GENI SE blocks, and a UFS host controller via SCMI.

> Add SoC-level device tree include for Nord GearVM variant, where a VM
> controls platform resources (clocks, regulators, powerdomains, etc.)
> as SCMI server. It currently covers:
> 
>  - 64 SCMI shared memory regions reserved at 0xd7600000-0xd763f000
>    for SMC-based firmware communication channels
>  - Three QUPV3 GENI SE QUP blocks (qupv3_0/1/2) with I2C/SPI/UART
>    controllers using SCMI power and performance domains via scmi11
>  - UFS host controller with SCMI power domain via scmi3

[Severity: Medium]
Could the commit message be updated to mention the thermal sensor protocol
support? The device tree adds scmi23_sensor utilizing protocol@15, which
is undocumented in the commit message.

> diff --git a/arch/arm64/boot/dts/qcom/nord-gearvm.dtsi b/arch/arm64/boot/dts/qcom/nord-gearvm.dtsi
> new file mode 100644
> index 0000000000000..cd20acb89c1bb
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/nord-gearvm.dtsi

[ ... ]

> +	scmi57: scmi-57 {
> +		compatible = "qcom,scmi-smc";
> +		arm,smc-id = <0xc6008012>;
> +		shmem = <&shmem57>;
> +		interrupts = <GIC_ESPI 32 IRQ_TYPE_EDGE_RISING>;

[Severity: Low]
Do the dummy interrupts in scmi57 through scmi63 conflict with apps_smmu_0?

Since apps_smmu_0 is statically assigned GIC_ESPI 32 as IRQ_TYPE_LEVEL_HIGH in
nord.dtsi, if the bootloader enables these SCMI nodes but fails to rewrite the
dummy interrupt numbers, wouldn't genirq reject the interrupt request during
probe due to conflicting hardware interrupt assignments and trigger types?

> +		interrupt-names = "a2p";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		arm,max-msg = <10>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260810110726.775084-1-shengchao.guo@oss.qualcomm.com?part=2