[PATCH 19/25] ARM: dts: rockchip: Add SPI nodes for RV1106

[Vladislav Leonov <vlad@zlab.su>]

Rockchip RV1106 has two SPI controllers. Add the spi0 and spi1 nodes
together with their aliases, using the m0 pinmux and the DMA channels
of the single DMAC.

Compared to Rockchip BSP kernel add missing SCLK_IN_SPI1 to spi1 node.

Both nodes default to status = "disabled" and are enabled per-board.

Signed-off-by: Vladislav Leonov <vlad@zlab.su>
---

 arch/arm/boot/dts/rockchip/rv1106.dtsi | 34 ++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/boot/dts/rockchip/rv1106.dtsi b/arch/arm/boot/dts/rockchip/rv1106.dtsi
index 58ac297e4d75..ce2f169b1acd 100644
--- a/arch/arm/boot/dts/rockchip/rv1106.dtsi
+++ b/arch/arm/boot/dts/rockchip/rv1106.dtsi
@@ -30,6 +30,8 @@ aliases {
 		i2c2 = &i2c2;
 		i2c3 = &i2c3;
 		i2c4 = &i2c4;
+		spi0 = &spi0;
+		spi1 = &spi1;
 	};
 
 	cpus {
@@ -370,6 +372,38 @@ uart5: serial@ff4f0000 {
 			status = "disabled";
 		};
 
+		spi0: spi@ff500000 {
+			compatible = "rockchip,rv1106-spi", "rockchip,rk3066-spi";
+			reg = <0xff500000 0x1000>;
+			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>, <&cru SCLK_IN_SPI0>;
+			clock-names = "spiclk", "apb_pclk", "sclk_in";
+			dmas = <&dmac 1>, <&dmac 0>;
+			dma-names = "tx", "rx";
+			num-cs = <2>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi0m0_cs0 &spi0m0_cs1 &spi0m0_pins>;
+			status = "disabled";
+		};
+
+		spi1: spi@ff510000 {
+			compatible = "rockchip,rv1106-spi", "rockchip,rk3066-spi";
+			reg = <0xff510000 0x1000>;
+			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>, <&cru SCLK_IN_SPI1>;
+			clock-names = "spiclk", "apb_pclk", "sclk_in";
+			dmas = <&dmac 3>, <&dmac 2>;
+			dma-names = "tx", "rx";
+			num-cs = <2>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi1m0_cs0 &spi1m0_cs1 &spi1m0_pins>;
+			status = "disabled";
+		};
+
 		gpio1_ioc: syscon@ff538000 {
 			compatible = "rockchip,rv1106-gpio1-ioc", "syscon";
 			reg = <0xff538000 0x8000>;
-- 
2.47.3