From: sashiko-bot@kernel.org
To: "Tanmay Kathpalia" <tanmay.kathpalia@altera.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v4 3/8] dt-bindings: arm: altera: add Agilex5 SOCDK eMMC board variant
Date: Mon, 10 Aug 2026 19:10:39 +0000 [thread overview]
Message-ID: <20260810191040.535A31F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260810190025.25045-4-tanmay.kathpalia@altera.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Device Tree compilation will fail due to the undefined macro `COMBOPHY_RESET` in the `emmc` node.
--
--- Patch [3]: [PATCH v4 3/8] dt-bindings: arm: altera: add Agilex5 SOCDK eMMC board variant ---
commit a686e27903fc966d624926fbeae5d10fa6638ad7
Author: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
dt-bindings: arm: altera: add Agilex5 SOCDK eMMC board variant
Document the Agilex5 SoCDK with the eMMC daughter card, which uses the
shared HPS SD/eMMC host for onboard eMMC instead of an SD slot.
> diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml
> index 0b418d9d60dbd..ce3a8c1679e57 100644
> --- a/Documentation/devicetree/bindings/arm/altera.yaml
> +++ b/Documentation/devicetree/bindings/arm/altera.yaml
> @@ -112,6 +112,7 @@ properties:
> - intel,socfpga-agilex5-socdk
> - intel,socfpga-agilex5-socdk-013b
> - intel,socfpga-agilex5-socdk-debug
> + - intel,socfpga-agilex5-socdk-emmc
[Severity: Low]
Does this new variant introduce a regression when compiling the emmc node in
socfpga_agilex5.dtsi?
It appears that Device Tree compilation will fail due to the undefined macro
COMBOPHY_RESET in the emmc node.
In arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi:
emmc: mmc@10808000 {
compatible = "altr,agilex5-sd6hc", "cdns,sd6hc";
...
resets = <&rst SDMMC_RESET>, <&rst COMBOPHY_RESET>,
<&rst SDMMC_OCP_RESET>;
The resets property uses the COMBOPHY_RESET macro which is not defined in
dt-bindings/reset/altr,rst-mgr-s10.h or anywhere else in the tree. Because
the C preprocessor leaves undefined macros unexpanded, executing the dtbs make
target will result in a syntax error when the compiler expects integer cell
references.
Should this macro be added to the reset bindings, or is a different reset
intended here?
> - intel,socfpga-agilex5-socdk-modular
> - intel,socfpga-agilex5-socdk-nand
> - const: intel,socfpga-agilex5
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260810190025.25045-1-tanmay.kathpalia@altera.com?part=3
next prev parent reply other threads:[~2026-08-10 19:10 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-10 19:00 [PATCH v4 0/8] mmc: sdhci-cadence: add SD6HC support and Agilex5 enablement Tanmay Kathpalia
2026-08-10 19:00 ` [PATCH v4 1/8] dt-bindings: mmc: add Cadence SD6HC binding Tanmay Kathpalia
2026-08-10 19:00 ` [PATCH v4 2/8] arm64: dts: agilex5: add SD/eMMC host controller Tanmay Kathpalia
2026-08-10 19:00 ` [PATCH v4 3/8] dt-bindings: arm: altera: add Agilex5 SOCDK eMMC board variant Tanmay Kathpalia
2026-08-10 19:10 ` sashiko-bot [this message]
2026-08-10 19:18 ` Kathpalia, Tanmay
2026-08-10 19:00 ` [PATCH v4 4/8] arm64: dts: agilex5: add SOCDK eMMC daughter board Tanmay Kathpalia
2026-08-10 19:00 ` [PATCH v4 5/8] mmc: sdhci-cadence: rename SD4HC symbols for SD6HC groundwork Tanmay Kathpalia
2026-08-10 19:00 ` [PATCH v4 6/8] mmc: sdhci-cadence: refactor driver structure for V6 controller support Tanmay Kathpalia
2026-08-10 19:00 ` [PATCH v4 7/8] mmc: sdhci-cadence: add Cadence SD6HC support Tanmay Kathpalia
2026-08-10 19:18 ` sashiko-bot
2026-08-10 19:00 ` [PATCH v4 8/8] mmc: sdhci-cadence: add Altera Agilex5 " Tanmay Kathpalia
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