Re: [PATCH v6 9/9] arm64: dts: qcom: Map USB connector to EUD on Kodiak boards

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Rerouting the Type-C High-Speed endpoint to EUD breaks USB enumeration and role-switching because the required `eud` and `usb_2` nodes are left disabled.
- [Low] The patch references an undefined devicetree label `&eud_con`, which will cause a fatal `dtc` compilation error.
--

--- Patch [9]: [PATCH v6 9/9] arm64: dts: qcom: Map USB connector to EUD on Kodiak boards ---
commit 2fda8aaa91eca6e348e83f602c927ebd7362e954
Author: Elson Serrao <elson.serrao@oss.qualcomm.com>

arm64: dts: qcom: map USB connector endpoint to EUD on Kodiak boards

This commit updates board-level descriptions for Kodiak-based boards to map
the primary USB connector's High-Speed path through the Embedded USB Debugger
(EUD). It replaces the existing remote-endpoint mapping to usb_1_dwc3_hs with
eud_con to reflect the intended hardware topology.

> diff --git a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
> index f41ad446a39e..b1f1ff6b99e6 100644
> --- a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
> +++ b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
> @@ -98,7 +98,7 @@ port@0 {
>  					reg = <0>;
>  
>  					pmic_glink_hs_in: endpoint {
> -						remote-endpoint = <&usb_1_dwc3_hs>;
> +						remote-endpoint = <&eud_con>;
>  					};
>  				};
>  

[Severity: Low]
Will this compile cleanly? In the baseline kodiak.dtsi, the eud node
defines port@0, but it doesn't appear to define the eud_con label:

arch/arm64/boot/dts/qcom/kodiak.dtsi:
eud: eud@88e0000 {
    ...
    port@0 {
        eud_ep: endpoint {
            ...

Does the eud_con label need to be added to the SoC dtsi first to avoid a
device tree compiler syntax error?

[ ... ]

> @@ -1573,3 +1569,7 @@ &wifi {
>  	qcom,calibration-variant = "Fairphone_5";
>  	status = "okay";
>  };
> +
> +&eud_con {
> +	remote-endpoint = <&pmic_glink_hs_in>;
> +};

[Severity: High]
Does routing this connector through the EUD strand the primary USB controller
without a role switch provider?

The usb_1 node in this file is configured for usb-role-switch, but it is
severed from its High-Speed endpoint by this patch.

Additionally, in kodiak.dtsi, both the eud node and the secondary usb_2
controller it relies on have their status disabled by default:

arch/arm64/boot/dts/qcom/kodiak.dtsi:
eud: eud@88e0000 {
    ...
    status = "disabled";
...
usb_2: usb@a6f8800 {
    ...
    status = "disabled";

Since the board files don't override these to "okay", will this prevent the
graph traversal via fwnode_usb_role_switch_get() and break USB enumeration
entirely upon boot?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260811213610.2956147-1-elson.serrao@oss.qualcomm.com?part=9