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From: Janani Sunil <janani.sunil@analog.com>
To: "Nuno Sá" <nuno.sa@analog.com>,
	"Michael Hennerich" <Michael.Hennerich@analog.com>,
	"Jonathan Cameron" <jic23@kernel.org>,
	"David Lechner" <dlechner@baylibre.com>,
	"Andy Shevchenko" <andy@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Olivier Moysan" <olivier.moysan@foss.st.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Linus Walleij" <linusw@kernel.org>,
	"Bartosz Golaszewski" <brgl@kernel.org>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Shuah Khan" <skhan@linuxfoundation.org>,
	"Michael Walle" <mwalle@kernel.org>
Cc: linux@analog.com, linux-iio@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-gpio@vger.kernel.org, linux-doc@vger.kernel.org,
	jananisunil.dev@gmail.com,
	"Uwe Kleine-König" <u.kleine-koenig@baylibre.com>,
	"Janani Sunil" <janani.sunil@analog.com>
Subject: [PATCH v3 12/14] gpio: regmap: Add optional runtime PM support
Date: Thu, 13 Aug 2026 15:57:05 +0200	[thread overview]
Message-ID: <20260813-ad7768-driver-v3-12-cb554399ad26@analog.com> (raw)
In-Reply-To: <20260813-ad7768-driver-v3-0-cb554399ad26@analog.com>

Some gpio-regmap consumers share their regmap with a parent device that
may be runtime suspended. GPIO register accesses must resume that device
first.

Add an optional pm_dev field and acquire it before register translation
or access. Release it using runtime autosuspend after each operation.
Keep the device active across the complete direction-output sequence and
propagate failure when setting the initial output value.

Signed-off-by: Janani Sunil <janani.sunil@analog.com>
---
 drivers/gpio/gpio-regmap.c  | 102 ++++++++++++++++++++++++++++++++++++--------
 include/linux/gpio/regmap.h |   2 +
 2 files changed, 87 insertions(+), 17 deletions(-)

diff --git a/drivers/gpio/gpio-regmap.c b/drivers/gpio/gpio-regmap.c
index a5188f8569e3..4d5d92c15679 100644
--- a/drivers/gpio/gpio-regmap.c
+++ b/drivers/gpio/gpio-regmap.c
@@ -10,6 +10,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/module.h>
+#include <linux/pm_runtime.h>
 #include <linux/regmap.h>
 #include <linux/slab.h>
 #include <linux/types.h>
@@ -31,6 +32,7 @@ struct gpio_regmap {
 	unsigned int reg_clr_base;
 	unsigned int reg_dir_in_base;
 	unsigned int reg_dir_out_base;
+	struct device *pm_dev;
 	unsigned long *fixed_direction_mask;
 	unsigned long *fixed_direction_output;
 
@@ -67,6 +69,22 @@ static int gpio_regmap_simple_xlate(struct gpio_regmap *gpio,
 	return 0;
 }
 
+static int gpio_regmap_runtime_get(struct gpio_regmap *gpio)
+{
+	if (!gpio->pm_dev)
+		return 0;
+
+	return pm_runtime_resume_and_get(gpio->pm_dev);
+}
+
+static void gpio_regmap_runtime_put(struct gpio_regmap *gpio)
+{
+	if (!gpio->pm_dev)
+		return;
+
+	pm_runtime_put_autosuspend(gpio->pm_dev);
+}
+
 static int gpio_regmap_get(struct gpio_chip *chip, unsigned int offset)
 {
 	struct gpio_regmap *gpio = gpiochip_get_data(chip);
@@ -79,20 +97,28 @@ static int gpio_regmap_get(struct gpio_chip *chip, unsigned int offset)
 	else
 		base = gpio_regmap_addr(gpio->reg_set_base);
 
-	ret = gpio->reg_mask_xlate(gpio, base, offset, &reg, &mask);
+	ret = gpio_regmap_runtime_get(gpio);
 	if (ret)
 		return ret;
 
+	ret = gpio->reg_mask_xlate(gpio, base, offset, &reg, &mask);
+	if (ret)
+		goto out_pm_put;
+
 	/* ensure we don't spoil any register cache with pin input values */
 	if (gpio->reg_dat_base == gpio->reg_set_base) {
 		ret = regmap_read_bypassed(gpio->regmap, reg, &val);
 		if (ret)
-			return ret;
+			goto out_pm_put;
 
-		return !!(val & mask);
+		ret = !!(val & mask);
+	} else {
+		ret = regmap_test_bits(gpio->regmap, reg, mask);
 	}
 
-	return regmap_test_bits(gpio->regmap, reg, mask);
+out_pm_put:
+	gpio_regmap_runtime_put(gpio);
+	return ret;
 }
 
 static int gpio_regmap_set(struct gpio_chip *chip, unsigned int offset,
@@ -103,10 +129,14 @@ static int gpio_regmap_set(struct gpio_chip *chip, unsigned int offset,
 	unsigned int reg, mask, mask_val;
 	int ret;
 
-	ret = gpio->reg_mask_xlate(gpio, base, offset, &reg, &mask);
+	ret = gpio_regmap_runtime_get(gpio);
 	if (ret)
 		return ret;
 
+	ret = gpio->reg_mask_xlate(gpio, base, offset, &reg, &mask);
+	if (ret)
+		goto out_pm_put;
+
 	if (val)
 		mask_val = mask;
 	else
@@ -118,6 +148,8 @@ static int gpio_regmap_set(struct gpio_chip *chip, unsigned int offset,
 	else
 		ret = regmap_update_bits(gpio->regmap, reg, mask, mask_val);
 
+out_pm_put:
+	gpio_regmap_runtime_put(gpio);
 	return ret;
 }
 
@@ -128,6 +160,10 @@ static int gpio_regmap_set_with_clear(struct gpio_chip *chip,
 	unsigned int base, reg, mask;
 	int ret;
 
+	ret = gpio_regmap_runtime_get(gpio);
+	if (ret)
+		return ret;
+
 	if (val)
 		base = gpio_regmap_addr(gpio->reg_set_base);
 	else
@@ -135,9 +171,13 @@ static int gpio_regmap_set_with_clear(struct gpio_chip *chip,
 
 	ret = gpio->reg_mask_xlate(gpio, base, offset, &reg, &mask);
 	if (ret)
-		return ret;
+		goto out_pm_put;
 
-	return regmap_write(gpio->regmap, reg, mask);
+	ret = regmap_write(gpio->regmap, reg, mask);
+
+out_pm_put:
+	gpio_regmap_runtime_put(gpio);
+	return ret;
 }
 
 static bool gpio_regmap_fixed_direction(struct gpio_regmap *gpio,
@@ -183,18 +223,26 @@ static int gpio_regmap_get_direction(struct gpio_chip *chip,
 		return -ENOTSUPP;
 	}
 
-	ret = gpio->reg_mask_xlate(gpio, base, offset, &reg, &mask);
+	ret = gpio_regmap_runtime_get(gpio);
 	if (ret)
 		return ret;
 
+	ret = gpio->reg_mask_xlate(gpio, base, offset, &reg, &mask);
+	if (ret)
+		goto out_pm_put;
+
 	ret = regmap_test_bits(gpio->regmap, reg, mask);
 	if (ret < 0)
-		return ret;
+		goto out_pm_put;
 
 	if (ret ^ invert)
-		return GPIO_LINE_DIRECTION_OUT;
+		ret = GPIO_LINE_DIRECTION_OUT;
 	else
-		return GPIO_LINE_DIRECTION_IN;
+		ret = GPIO_LINE_DIRECTION_IN;
+
+out_pm_put:
+	gpio_regmap_runtime_put(gpio);
+	return ret;
 }
 
 static int gpio_regmap_try_direction_fixed(struct gpio_regmap *gpio,
@@ -237,16 +285,24 @@ static int gpio_regmap_set_direction(struct gpio_chip *chip,
 		return -ENOTSUPP;
 	}
 
-	ret = gpio->reg_mask_xlate(gpio, base, offset, &reg, &mask);
+	ret = gpio_regmap_runtime_get(gpio);
 	if (ret)
 		return ret;
 
+	ret = gpio->reg_mask_xlate(gpio, base, offset, &reg, &mask);
+	if (ret)
+		goto out_pm_put;
+
 	if (invert)
 		val = output ? 0 : mask;
 	else
 		val = output ? mask : 0;
 
-	return regmap_update_bits(gpio->regmap, reg, mask, val);
+	ret = regmap_update_bits(gpio->regmap, reg, mask, val);
+
+out_pm_put:
+	gpio_regmap_runtime_put(gpio);
+	return ret;
 }
 
 static int gpio_regmap_direction_input(struct gpio_chip *chip,
@@ -261,6 +317,10 @@ static int gpio_regmap_direction_output(struct gpio_chip *chip,
 	struct gpio_regmap *gpio = gpiochip_get_data(chip);
 	int ret;
 
+	ret = gpio_regmap_runtime_get(gpio);
+	if (ret)
+		return ret;
+
 	/*
 	 * First check if this is gonna work on a fixed direction line,
 	 * if it doesn't (i.e. this is a fixed input line), then do not
@@ -269,12 +329,18 @@ static int gpio_regmap_direction_output(struct gpio_chip *chip,
 	if (gpio_regmap_fixed_direction(gpio, offset)) {
 		ret = gpio_regmap_try_direction_fixed(gpio, offset, true);
 		if (ret)
-			return ret;
+			goto out_pm_put;
 	}
 
-	gpio_regmap_set(chip, offset, value);
+	ret = gpio_regmap_set(chip, offset, value);
+	if (ret)
+		goto out_pm_put;
 
-	return gpio_regmap_set_direction(chip, offset, true);
+	ret = gpio_regmap_set_direction(chip, offset, true);
+
+out_pm_put:
+	gpio_regmap_runtime_put(gpio);
+	return ret;
 }
 
 void *gpio_regmap_get_drvdata(struct gpio_regmap *gpio)
@@ -324,6 +390,7 @@ struct gpio_regmap *gpio_regmap_register(const struct gpio_regmap_config *config
 	gpio->reg_clr_base = config->reg_clr_base;
 	gpio->reg_dir_in_base = config->reg_dir_in_base;
 	gpio->reg_dir_out_base = config->reg_dir_out_base;
+	gpio->pm_dev = config->pm_dev;
 
 	chip = &gpio->gpio_chip;
 	chip->parent = config->parent;
@@ -331,7 +398,8 @@ struct gpio_regmap *gpio_regmap_register(const struct gpio_regmap_config *config
 	chip->base = -1;
 	chip->names = config->names;
 	chip->label = config->label ?: dev_name(config->parent);
-	chip->can_sleep = regmap_might_sleep(config->regmap);
+	chip->can_sleep = config->pm_dev ||
+			  regmap_might_sleep(config->regmap);
 	chip->init_valid_mask = config->init_valid_mask;
 
 	chip->request = gpiochip_generic_request;
diff --git a/include/linux/gpio/regmap.h b/include/linux/gpio/regmap.h
index 06255756710d..aae32a569914 100644
--- a/include/linux/gpio/regmap.h
+++ b/include/linux/gpio/regmap.h
@@ -29,6 +29,7 @@ struct regmap;
  * @reg_clr_base:	(Optional) clear register base address
  * @reg_dir_in_base:	(Optional) in setting register base address
  * @reg_dir_out_base:	(Optional) out setting register base address
+ * @pm_dev:		(Optional) Device to use for runtime power management.
  * @reg_stride:		(Optional) May be set if the registers (of the
  *			same type, dat, set, etc) are not consecutive.
  * @ngpio_per_reg:	(Optional) Number of GPIOs per register
@@ -92,6 +93,7 @@ struct gpio_regmap_config {
 	unsigned int reg_clr_base;
 	unsigned int reg_dir_in_base;
 	unsigned int reg_dir_out_base;
+	struct device *pm_dev;
 	int reg_stride;
 	int ngpio_per_reg;
 	struct irq_domain *irq_domain;

-- 
2.43.0


  parent reply	other threads:[~2026-08-13 13:58 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-13 13:56 [PATCH v3 00/14] iio: adc: Add AD7768/AD7768-4 ADC driver support Janani Sunil
2026-08-13 13:56 ` [PATCH v3 01/14] dt-bindings: iio: adc: Add AD7768 Janani Sunil
2026-08-16 18:24   ` Jonathan Cameron
2026-08-18  8:27     ` Janani Sunil
2026-08-22  1:45       ` Jonathan Cameron
2026-08-13 13:56 ` [PATCH v3 02/14] iio: backend: Add support for CRC Janani Sunil
2026-08-16 18:27   ` Jonathan Cameron
2026-08-16 18:33     ` Jonathan Cameron
2026-08-13 13:56 ` [PATCH v3 03/14] iio: adc: adi-axi-adc: Initialize state mutex Janani Sunil
2026-08-16 18:29   ` Jonathan Cameron
2026-08-13 13:56 ` [PATCH v3 04/14] iio: adc: adi-axi-adc: Add support for CRC Janani Sunil
2026-08-13 13:56 ` [PATCH v3 05/14] iio: adc: Add AD7768 and AD7768-4 core support Janani Sunil
     [not found]   ` <20260816201049.480143e1@jic23-huawei>
2026-08-24 14:45     ` Philipp Zabel
2026-08-24 15:06       ` Andy Shevchenko
2026-08-13 13:56 ` [PATCH v3 06/14] iio: adc: ad7768: Add configurable sampling modes Janani Sunil
2026-08-16 19:35   ` Jonathan Cameron
2026-08-13 13:57 ` [PATCH v3 07/14] iio: adc: ad7768: Add calibration controls Janani Sunil
2026-08-16 19:37   ` Jonathan Cameron
2026-08-13 13:57 ` [PATCH v3 08/14] iio: adc: ad7768: Add per-channel conversion delay Janani Sunil
2026-08-13 13:57 ` [PATCH v3 09/14] iio: adc: ad7768: Add VCM regulator support Janani Sunil
2026-08-16 19:46   ` Jonathan Cameron
2026-08-13 13:57 ` [PATCH v3 10/14] iio: adc: ad7768: Register GPIO auxiliary device Janani Sunil
2026-08-13 13:57 ` [PATCH v3 11/14] gpio: regmap: Use regmap_test_bits() for single bit reads Janani Sunil
2026-08-14  7:04   ` Linus Walleij
2026-08-14  7:28   ` Michael Walle
2026-08-14  8:28   ` Andy Shevchenko
2026-08-13 13:57 ` Janani Sunil [this message]
2026-08-14  7:07   ` [PATCH v3 12/14] gpio: regmap: Add optional runtime PM support Linus Walleij
2026-08-14  7:30   ` Michael Walle
2026-08-14  8:34   ` Andy Shevchenko
2026-08-16 17:59     ` Jonathan Cameron
2026-08-13 13:57 ` [PATCH v3 13/14] gpio: ad7768: Add AD7768 GPIO auxiliary driver Janani Sunil
2026-08-14  7:05   ` Linus Walleij
2026-08-14  8:43   ` Andy Shevchenko
2026-08-13 13:57 ` [PATCH v3 14/14] Documentation: iio: Add AD7768 Documentation Janani Sunil
2026-08-14  8:45 ` [PATCH v3 00/14] iio: adc: Add AD7768/AD7768-4 ADC driver support Andy Shevchenko

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