* [PATCH v1] arm64: dts: ti: k3-am62-verdin: Set MMC clock pins as OUTPUT
@ 2026-08-13 11:12 Francesco Dolcini
2026-08-13 11:24 ` sashiko-bot
0 siblings, 1 reply; 3+ messages in thread
From: Francesco Dolcini @ 2026-08-13 11:12 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: Francesco Dolcini, linux-arm-kernel, devicetree, linux-kernel,
Judith Mendez, Moteen Shah, stable
From: Francesco Dolcini <francesco.dolcini@toradex.com>
MMC clock pins must be configured as OUTPUT-only per TRM [0] with
receiver disabled (RXACTIVE bit = 0). Change MMC CLK pins from
PIN_INPUT to PIN_OUTPUT to match documentation.
Link: https://www.ti.com/lit/pdf/spruiv7 Rev. C: Table 12-246. MMCSDi I/O Signals [0]
Fixes: 316b80246b16 ("arm64: dts: ti: add verdin am62")
Cc: stable@vger.kernel.org
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
---
arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
index e97b2b047d10..895b1b7dcac7 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
@@ -573,7 +573,7 @@ AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */ /* ETH_1_MDIO, SODIMM
pinctrl_sdhci0: main-mmc0-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
- AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
+ AM62X_IOPAD(0x218, PIN_OUTPUT, 0) /* (AB1) MMC0_CLK */
AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
AM62X_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */
AM62X_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */
@@ -589,7 +589,7 @@ AM62X_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */
pinctrl_sdhci1: main-mmc1-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ /* SODIMM 74 */
- AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ /* SODIMM 78 */
+ AM62X_IOPAD(0x234, PIN_OUTPUT, 0) /* (B22) MMC1_CLK */ /* SODIMM 78 */
AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ /* SODIMM 80 */
AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ /* SODIMM 82 */
AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ /* SODIMM 70 */
@@ -601,7 +601,7 @@ AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ /* SODIMM 72 */
pinctrl_sdhci2: main-mmc2-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x120, PIN_INPUT, 0) /* (C24) MMC2_CMD */ /* WiFi_SDIO_CMD */
- AM62X_IOPAD(0x118, PIN_INPUT, 0) /* (D25) MMC2_CLK */ /* WiFi_SDIO_CLK */
+ AM62X_IOPAD(0x118, PIN_OUTPUT,0) /* (D25) MMC2_CLK */ /* WiFi_SDIO_CLK */
AM62X_IOPAD(0x114, PIN_INPUT, 0) /* (B24) MMC2_DAT0 */ /* WiFi_SDIO_DATA0 */
AM62X_IOPAD(0x110, PIN_INPUT, 0) /* (C25) MMC2_DAT1 */ /* WiFi_SDIO_DATA1 */
AM62X_IOPAD(0x10c, PIN_INPUT, 0) /* (E23) MMC2_DAT2 */ /* WiFi_SDIO_DATA2 */
--
2.47.3
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH v1] arm64: dts: ti: k3-am62-verdin: Set MMC clock pins as OUTPUT
2026-08-13 11:12 [PATCH v1] arm64: dts: ti: k3-am62-verdin: Set MMC clock pins as OUTPUT Francesco Dolcini
@ 2026-08-13 11:24 ` sashiko-bot
2026-08-13 13:22 ` Francesco Dolcini
0 siblings, 1 reply; 3+ messages in thread
From: sashiko-bot @ 2026-08-13 11:24 UTC (permalink / raw)
To: Francesco Dolcini; +Cc: devicetree, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Setting MMC clock pins to PIN_OUTPUT disables the receiver (RXACTIVE=0), which breaks the internal clock loopback required by the MMC controller for read operations.
--
--- Patch [1]: [PATCH v1] arm64: dts: ti: k3-am62-verdin: Set MMC clock pins as OUTPUT ---
commit b7e315f9edd8f485234748a2f8e267539b5b0f30
Author: Francesco Dolcini <francesco.dolcini@toradex.com>
arm64: dts: ti: k3-am62-verdin: Set MMC clock pins as OUTPUT
This commit changes the MMC clock pins for the K3 AM62x Verdin module
from PIN_INPUT to PIN_OUTPUT to match the TRM documentation, effectively
disabling the receiver (RXACTIVE = 0).
Link: https://www.ti.com/lit/pdf/spruiv7 Rev. C: Table 12-246. MMCSDi I/O Signals [0]
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
> index e97b2b047d104..895b1b7dcac71 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
> @@ -573,7 +573,7 @@ AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */ /* ETH_1_MDIO, SODIMM
> pinctrl_sdhci0: main-mmc0-default-pins {
> pinctrl-single,pins = <
> AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
> - AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
> + AM62X_IOPAD(0x218, PIN_OUTPUT, 0) /* (AB1) MMC0_CLK */
[Severity: High]
Does configuring this pin as PIN_OUTPUT disable the receiver (RXACTIVE=0) and
break the internal clock loopback?
TI MMC controllers generally rely on this internal clock loopback path to
synchronize incoming data for read operations. While the TRM documents the
logical direction of the signal to the external card, disabling the input
receiver might lead to eMMC read failures and timeouts.
> AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
> AM62X_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */
[ ... ]
> @@ -589,7 +589,7 @@ AM62X_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */
> pinctrl_sdhci1: main-mmc1-default-pins {
> pinctrl-single,pins = <
> AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ /* SODIMM 74 */
> - AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ /* SODIMM 78 */
> + AM62X_IOPAD(0x234, PIN_OUTPUT, 0) /* (B22) MMC1_CLK */ /* SODIMM 78 */
[Severity: High]
Could this change similarly break the SD card read loopback?
> AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ /* SODIMM 80 */
> AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ /* SODIMM 82 */
[ ... ]
> @@ -601,7 +601,7 @@ AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ /* SODIMM 72 */
> pinctrl_sdhci2: main-mmc2-default-pins {
> pinctrl-single,pins = <
> AM62X_IOPAD(0x120, PIN_INPUT, 0) /* (C24) MMC2_CMD */ /* WiFi_SDIO_CMD */
> - AM62X_IOPAD(0x118, PIN_INPUT, 0) /* (D25) MMC2_CLK */ /* WiFi_SDIO_CLK */
> + AM62X_IOPAD(0x118, PIN_OUTPUT,0) /* (D25) MMC2_CLK */ /* WiFi_SDIO_CLK */
[Severity: High]
Will setting MMC2_CLK to PIN_OUTPUT clear the RXACTIVE bit and prevent the
WiFi SDIO from properly reading data?
> AM62X_IOPAD(0x114, PIN_INPUT, 0) /* (B24) MMC2_DAT0 */ /* WiFi_SDIO_DATA0 */
> AM62X_IOPAD(0x110, PIN_INPUT, 0) /* (C25) MMC2_DAT1 */ /* WiFi_SDIO_DATA1 */
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260813111238.56892-1-francesco@dolcini.it?part=1
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH v1] arm64: dts: ti: k3-am62-verdin: Set MMC clock pins as OUTPUT
2026-08-13 11:24 ` sashiko-bot
@ 2026-08-13 13:22 ` Francesco Dolcini
0 siblings, 0 replies; 3+ messages in thread
From: Francesco Dolcini @ 2026-08-13 13:22 UTC (permalink / raw)
To: sashiko-reviews, Judith Mendez
Cc: Francesco Dolcini, devicetree, robh, conor+dt
+Judith
On Thu, Aug 13, 2026 at 11:24:58AM +0000, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [High] Setting MMC clock pins to PIN_OUTPUT disables the receiver (RXACTIVE=0), which breaks the internal clock loopback required by the MMC controller for read operations.
> --
>
> --- Patch [1]: [PATCH v1] arm64: dts: ti: k3-am62-verdin: Set MMC clock pins as OUTPUT ---
> commit b7e315f9edd8f485234748a2f8e267539b5b0f30
> Author: Francesco Dolcini <francesco.dolcini@toradex.com>
>
> arm64: dts: ti: k3-am62-verdin: Set MMC clock pins as OUTPUT
>
> This commit changes the MMC clock pins for the K3 AM62x Verdin module
> from PIN_INPUT to PIN_OUTPUT to match the TRM documentation, effectively
> disabling the receiver (RXACTIVE = 0).
>
> Link: https://www.ti.com/lit/pdf/spruiv7 Rev. C: Table 12-246. MMCSDi I/O Signals [0]
>
> > diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
> > index e97b2b047d104..895b1b7dcac71 100644
> > --- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
> > +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
> > @@ -573,7 +573,7 @@ AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */ /* ETH_1_MDIO, SODIMM
> > pinctrl_sdhci0: main-mmc0-default-pins {
> > pinctrl-single,pins = <
> > AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
> > - AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
> > + AM62X_IOPAD(0x218, PIN_OUTPUT, 0) /* (AB1) MMC0_CLK */
>
> [Severity: High]
> Does configuring this pin as PIN_OUTPUT disable the receiver (RXACTIVE=0) and
> break the internal clock loopback?
>
> TI MMC controllers generally rely on this internal clock loopback path to
> synchronize incoming data for read operations. While the TRM documents the
> logical direction of the signal to the external card, disabling the input
> receiver might lead to eMMC read failures and timeouts.
Judith: is sashiko right on this?
Thanks,
Francesco
^ permalink raw reply [flat|nested] 3+ messages in thread
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2026-08-13 11:12 [PATCH v1] arm64: dts: ti: k3-am62-verdin: Set MMC clock pins as OUTPUT Francesco Dolcini
2026-08-13 11:24 ` sashiko-bot
2026-08-13 13:22 ` Francesco Dolcini
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