Re: [PATCH v3 4/4] ARM: dts: vf: add Iris carrier board support for Colibri VF50 and VF61

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] The `&gpio2` node unconditionally overwrites `pinctrl-0`, destroying the base GPIO configuration inherited from `vf-colibri.dtsi`.
- [Medium] The commit message claims to describe PWM support for the carrier board, but the PWM nodes are completely missing from the device tree additions.
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--- Patch [4]: [PATCH v3 4/4] ARM: dts: vf: add Iris carrier board support for Colibri VF50 and VF61 ---
commit 30782cd9b9ebbf78c0851af32f14e744e591610e
Author: Mehmet Fide <mehmet.fide@screeningeagle.com>

ARM: dts: vf: add Iris carrier board support for Colibri VF50 and VF61

The Iris is a small off-the-shelf carrier board for the Colibri family. This 
adds the device tree descriptions for the board's peripherals.

> The Iris is a small off-the-shelf carrier board for the Colibri
> family. Describe what the board itself provides: Ethernet, one USB
> host and one OTG port, the pin header UARTs, i2c with the carrier
> RTC on it, PWM, SPI and the microSD slot. The host port gets its

[Severity: Medium]
The commit message mentions adding support for PWM, but it appears the &pwm0
and &pwm1 nodes were not enabled in the device tree additions. Are the PWM
controller nodes missing from this patch?

> diff --git a/arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi b/arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi
> new file mode 100644
> index 0000000000000..bbd0dd76c33c0
> --- /dev/null
> +++ b/arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi

[ ... ]

> +&gpio2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_iris_uart25_tx_on>;

[Severity: Medium]
Does this unconditionally overwrite the pinctrl-0 configuration inherited from
vf-colibri.dtsi?

It seems this would drop the base configuration (like pinctrl_gpio_ext) instead
of appending to it, which might leave the EXT_IO_0..2 pins in an indeterminate 
mux and bias state. Could this be changed to append to the existing pinctrl-0 
list?

> +
> +	uart25-tx-on-hog {
> +		gpio-hog;
> +		gpios = <2 GPIO_ACTIVE_HIGH>;	/* SODIMM 104 */
> +		output-high;
> +	};
> +};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260813140600.1824949-1-mehmet.fide@gmail.com?part=4